From: Fei Yang <fyang@gcc.gnu.org>
Date: Tue, 5 May 2015 15:59:12 +0000 (+0000)
Subject: backport: re PR target/64304 (AArch64 miscompilation with -mgeneral-regs-only)
X-Git-Tag: releases/gcc-4.8.5~135
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=6fae41f850c19c7695604c19f7483cd76f125d00;p=thirdparty%2Fgcc.git

backport: re PR target/64304 (AArch64 miscompilation with -mgeneral-regs-only)

        Backported from mainline
        2015-01-19  Jiong Wang  <jiong.wang@arm.com>
                    Andrew Pinski  <apinski@cavium.com>

        PR target/64304
        * config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
        (ashl<mode>3): Don't expand if operands[2] is not constant.

From-SVN: r222814
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5648860fd0d3..b57291553a09 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2015-05-05  Shanyao Chen  <chenshanyao@huawei.com>
+
+	Backported from mainline
+	2015-01-19  Jiong Wang  <jiong.wang@arm.com>
+		    Andrew Pinski  <apinski@cavium.com>
+
+	PR target/64304
+	* config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
+	(ashl<mode>3): Don't expand if operands[2] is not constant.
+
 2015-05-05  Peter Bergner  <bergner@vnet.ibm.com>
 
 	Backport from mainline.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c879024ebf68..f5c0761d4f1b 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2612,6 +2612,8 @@
 	    DONE;
           }
       }
+    else
+      FAIL;
   }
 )
 
@@ -2681,16 +2683,6 @@
    (set_attr "mode" "SI")]
 )
 
-(define_insn "*ashl<mode>3_insn"
-  [(set (match_operand:SHORT 0 "register_operand" "=r")
-	(ashift:SHORT (match_operand:SHORT 1 "register_operand" "r")
-		      (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))]
-  ""
-  "lsl\\t%<w>0, %<w>1, %<w>2"
-  [(set_attr "v8type" "shift")
-   (set_attr "mode" "<MODE>")]
-)
-
 (define_insn "*<optab><mode>3_insn"
   [(set (match_operand:SHORT 0 "register_operand" "=r")
 	(ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2f3541534525..dde3fb3e441e 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2015-05-05  Shanyao chen  <chenshanyao@huawei.com>
+
+	Backported from mainline
+	2015-01-19  Jiong Wang  <jiong.wang@arm.com>
+
+	* gcc.target/aarch64/pr64304.c: New testcase.
+
 2015-05-05  Peter Bergner  <bergner@vnet.ibm.com>
 
 	Backport from mainline.
diff --git a/gcc/testsuite/gcc.target/aarch64/pr64304.c b/gcc/testsuite/gcc.target/aarch64/pr64304.c
new file mode 100644
index 000000000000..721b6b958054
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr64304.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */ 
+/* { dg-options "-O2 --save-temps" } */ 
+ 
+unsigned char byte = 0; 
+  
+void 
+set_bit (unsigned int bit, unsigned char value) 
+{ 
+  unsigned char mask = (unsigned char) (1 << (bit & 7)); 
+ 
+  if (! value) 
+    byte &= (unsigned char)~mask; 
+  else 
+    byte |= mask; 
+    /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */ 
+} 
+  
+/* { dg-final { cleanup-saved-temps } } */