From: Karl Meakin Date: Wed, 10 Dec 2025 16:21:55 +0000 (+0000) Subject: aarch64: use `unspec` type for unspec codes X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=70859b5efb58dfef620b5ed7019d4338f9642783;p=thirdparty%2Fgcc.git aarch64: use `unspec` type for unspec codes Change the type of variables/parameters/data members that are used to hold unspec codes from `int` to `unspec`. This makes GDB print their symbolic names rather than their integer value. gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (struct aarch64_pragma_builtins_data): Change type to `unspec`. (aarch64_get_low_unspec): Likewise. (aarch64_expand_fpsr_fpcr_setter): Likewise. (aarch64_expand_tbl_tbx): Add `default` case to `switch` statement to silence warning. * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla): Change type to `unspec`. (unspec_fcmla): Likewise. (unspec_cond_fcmla): Likewise. (expand_mla_mls_lane): Likewise. (svac_impl): Likewise. (svbrk_binary_impl): Likewise. (svbrk_unary_impl): Likewise. (svclast_impl): Likewise. (svcmla_impl): Likewise. (svcmp_impl): Likewise. (svcmp_wide_impl): Likewise. (svcvt_impl): Likewise. (svlast_impl): Likewise. (svldxf1_impl): Likewise. (svldxf1_extend_impl): Likewise. (svnot_impl): Likewise. (svpfirst_svpnext_impl): Likewise. (svrint_impl): Likewise. (svsel_impl): Likewise. (svwhilelx_impl): Likewise. * config/aarch64/aarch64-sve-builtins-functions.h(rtx_code_function_base): Likewise. * config/aarch64/aarch64-sve-builtins-sme.cc (expand_ld1_st1): Likewise. * config/aarch64/aarch64-sve-builtins-sve2.cc (expand_ld1_st1): Likewise. * config/aarch64/aarch64-acle-builtins.cc (function_expander::map_to_rtx_codes): Likewise. (function_expander::map_to_unspecs): Likewise. * config/aarch64/aarch64-acle-builtins.h: Likewise. * config/aarch64/aarch64.cc (aarch64_replace_reg_mode): Likewise. (aarch64_split_sve_subreg_move): Likewise. (aarch_pac_insn_p): Likewise. (aarch64_evpc_hvla): Likewise. * config/aarch64/aarch64.md: Add `UNSPEC_NONE` enum member. --- diff --git a/gcc/config/aarch64/aarch64-acle-builtins.cc b/gcc/config/aarch64/aarch64-acle-builtins.cc index 3260149da48..e1187859ec5 100644 --- a/gcc/config/aarch64/aarch64-acle-builtins.cc +++ b/gcc/config/aarch64/aarch64-acle-builtins.cc @@ -3762,8 +3762,8 @@ function_expander::use_contiguous_store_insn (insn_code icode) rtx function_expander::map_to_rtx_codes (rtx_code code_for_sint, rtx_code code_for_uint, - int unspec_for_cond_fp, - int unspec_for_uncond_fp, + unspec unspec_for_cond_fp, + unspec unspec_for_uncond_fp, unsigned int merge_argno) { machine_mode mode = tuple_mode (0); @@ -3839,13 +3839,13 @@ function_expander::map_to_rtx_codes (rtx_code code_for_sint, MERGE_ARGNO is the argument that provides the values of inactive lanes for _m functions, or DEFAULT_MERGE_ARGNO if we should apply the usual rules. */ rtx -function_expander::map_to_unspecs (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp, unsigned int merge_argno) +function_expander::map_to_unspecs (unspec unspec_for_sint, unspec unspec_for_uint, + unspec unspec_for_fp, unsigned int merge_argno) { machine_mode mode = tuple_mode (0); - int unspec = (!type_suffix (0).integer_p ? unspec_for_fp - : type_suffix (0).unsigned_p ? unspec_for_uint - : unspec_for_sint); + unspec unspec = (!type_suffix (0).integer_p ? unspec_for_fp + : type_suffix (0).unsigned_p ? unspec_for_uint + : unspec_for_sint); if (mode_suffix_id == MODE_single) { diff --git a/gcc/config/aarch64/aarch64-acle-builtins.h b/gcc/config/aarch64/aarch64-acle-builtins.h index ddf9abc434b..eedea9d4d7d 100644 --- a/gcc/config/aarch64/aarch64-acle-builtins.h +++ b/gcc/config/aarch64/aarch64-acle-builtins.h @@ -730,9 +730,9 @@ public: rtx use_contiguous_prefetch_insn (insn_code); rtx use_contiguous_store_insn (insn_code); - rtx map_to_rtx_codes (rtx_code, rtx_code, int, int, + rtx map_to_rtx_codes (rtx_code, rtx_code, unspec, unspec, unsigned int = DEFAULT_MERGE_ARGNO); - rtx map_to_unspecs (int, int, int, unsigned int = DEFAULT_MERGE_ARGNO); + rtx map_to_unspecs (unspec, unspec, unspec, unsigned int = DEFAULT_MERGE_ARGNO); /* The function call expression. */ tree call_expr; diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index facc8bc1e71..8cd1bc4b1a2 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -1499,7 +1499,7 @@ struct aarch64_pragma_builtins_data const char *name; aarch64_builtin_signatures signature; simd_type types[4]; - int unspec; + enum unspec unspec; aarch64_required_extensions required_extensions; unsigned int flags; }; @@ -3829,7 +3829,7 @@ aarch64_pack_into_v128s (expand_operand *op) /* UNSPEC is a high unspec, indicated by "2" in mnemonics and "_high" in intrinsic names. Return the equivalent low unspec. */ static int -aarch64_get_low_unspec (int unspec) +aarch64_get_low_unspec (unspec unspec) { switch (unspec) { @@ -3850,7 +3850,7 @@ aarch64_get_low_unspec (int unspec) UNSPEC is either UNSPEC_TBL or UNSPEC_TBX. The inputs must already be in registers. */ static rtx -aarch64_expand_tbl_tbx (vec &inputs, int unspec, machine_mode mode) +aarch64_expand_tbl_tbx (vec &inputs, unspec unspec, machine_mode mode) { rtx result = gen_reg_rtx (mode); rtvec vec = gen_rtvec_v (inputs.length (), inputs.address ()); @@ -3863,7 +3863,7 @@ aarch64_expand_tbl_tbx (vec &inputs, int unspec, machine_mode mode) UNSPEC is either UNSPEC_TBL or UNSPEC_TBX. */ static rtx -aarch64_expand_tbl_tbx (vec &ops, int unspec) +aarch64_expand_tbl_tbx (vec &ops, unspec unspec) { for (unsigned int i = 1; i < ops.length (); ++i) ops[i].value = force_reg (ops[i].mode, ops[i].value); @@ -4012,6 +4012,8 @@ aarch64_expand_pragma_builtin (tree exp, rtx target, halves don't actually matter. */ aarch64_convert_to_v64 (&ops[1]); break; + default: + break; } insn_code icode; @@ -4197,7 +4199,7 @@ aarch64_expand_pragma_builtin (tree exp, rtx target, /* Expand an expression EXP as fpsr or fpcr setter (depending on UNSPEC) using MODE. */ static void -aarch64_expand_fpsr_fpcr_setter (int unspec, machine_mode mode, tree exp) +aarch64_expand_fpsr_fpcr_setter (unspecv unspec, machine_mode mode, tree exp) { tree arg = CALL_EXPR_ARG (exp, 0); rtx op = force_reg (mode, expand_normal (arg)); diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc index 7f047bb6468..2696f04509d 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc @@ -73,7 +73,7 @@ is_undef (tree val) } /* Return the UNSPEC_CMLA* unspec for rotation amount ROT. */ -static int +static unspec unspec_cmla (int rot) { switch (rot) @@ -87,7 +87,7 @@ unspec_cmla (int rot) } /* Return the UNSPEC_FCMLA* unspec for rotation amount ROT. */ -static int +static unspec unspec_fcmla (int rot) { switch (rot) @@ -101,7 +101,7 @@ unspec_fcmla (int rot) } /* Return the UNSPEC_COND_FCMLA* unspec for rotation amount ROT. */ -static int +static unspec unspec_cond_fcmla (int rot) { switch (rot) @@ -137,7 +137,7 @@ expand_mad (function_expander &e, /* Expand a call to svmla_lane or svmls_lane using floating-point unspec UNSPEC. */ static rtx -expand_mla_mls_lane (function_expander &e, int unspec) +expand_mla_mls_lane (function_expander &e, unspec unspec) { /* Put the operands in the normal (fma ...) order, with the accumulator last. This fits naturally since that's also the unprinted operand @@ -199,7 +199,7 @@ public: class svac_impl : public function_base { public: - constexpr svac_impl (int unspec) : m_unspec (unspec) {} + constexpr svac_impl (unspec unspec) : m_unspec (unspec) {} gimple * fold (gimple_folder &f) const override @@ -220,7 +220,7 @@ public: } /* The unspec code for the underlying comparison. */ - int m_unspec; + unspec m_unspec; }; class svadda_impl : public function_base @@ -308,7 +308,7 @@ public: { machine_mode mode = GET_MODE_INNER (e.vector_mode (0)); e.args[2] = simplify_unary_operation (NOT, mode, e.args[2], mode); - return e.map_to_rtx_codes (AND, AND, -1, -1); + return e.map_to_rtx_codes (AND, AND, UNSPEC_NONE, UNSPEC_NONE); } if (e.type_suffix_ids[0] == TYPE_SUFFIX_b) @@ -328,7 +328,7 @@ public: class svbrk_binary_impl : public function_base { public: - constexpr svbrk_binary_impl (int unspec) : m_unspec (unspec) {} + constexpr svbrk_binary_impl (unspec unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -337,14 +337,14 @@ public: } /* The unspec code associated with the operation. */ - int m_unspec; + unspec m_unspec; }; /* Implements svbrka and svbrkb. */ class svbrk_unary_impl : public function_base { public: - constexpr svbrk_unary_impl (int unspec) : m_unspec (unspec) {} + constexpr svbrk_unary_impl (unspec unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -353,7 +353,7 @@ public: } /* The unspec code associated with the operation. */ - int m_unspec; + unspec m_unspec; }; class svcadd_impl : public function_base @@ -378,7 +378,7 @@ public: class svclast_impl : public quiet { public: - constexpr svclast_impl (int unspec) : m_unspec (unspec) {} + constexpr svclast_impl (unspec unspec) : m_unspec (unspec) {} gimple * fold (gimple_folder &f) const override @@ -403,7 +403,7 @@ public: } /* The unspec code associated with the operation. */ - int m_unspec; + unspec m_unspec; }; class svcmla_impl : public function_base @@ -419,12 +419,12 @@ public: /* Make the operand order the same as the one used by the fma optabs, with the accumulator last. */ e.rotate_inputs_left (1, 4); - return e.map_to_unspecs (-1, -1, unspec_cond_fcmla (rot), 3); + return e.map_to_unspecs (UNSPEC_NONE, UNSPEC_NONE, unspec_cond_fcmla (rot), 3); } else { - int cmla = unspec_cmla (rot); - return e.map_to_unspecs (cmla, cmla, -1); + unspec cmla = unspec_cmla (rot); + return e.map_to_unspecs (cmla, cmla, UNSPEC_NONE); } } }; @@ -458,7 +458,7 @@ public: class svcmp_impl : public function_base { public: - constexpr svcmp_impl (tree_code code, int unspec_for_fp) + constexpr svcmp_impl (tree_code code, unspec unspec_for_fp) : m_code (code), m_unspec_for_fp (unspec_for_fp) {} gimple * @@ -509,15 +509,15 @@ public: tree_code m_code; /* The unspec code to use for floating-point comparisons. */ - int m_unspec_for_fp; + unspec m_unspec_for_fp; }; /* Implements svcmp_wide. */ class svcmp_wide_impl : public function_base { public: - constexpr svcmp_wide_impl (tree_code code, int unspec_for_sint, - int unspec_for_uint) + constexpr svcmp_wide_impl (tree_code code, unspec unspec_for_sint, + unspec unspec_for_uint) : m_code (code), m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint) {} @@ -552,7 +552,7 @@ public: return e.use_exact_insn (icode); } - int unspec = (unsigned_p ? m_unspec_for_uint : m_unspec_for_sint); + unspec unspec = (unsigned_p ? m_unspec_for_uint : m_unspec_for_sint); return e.use_exact_insn (code_for_aarch64_pred_cmp_wide (unspec, mode)); } @@ -561,8 +561,8 @@ public: /* The unspec codes for signed and unsigned wide comparisons respectively. */ - int m_unspec_for_sint; - int m_unspec_for_uint; + unspec m_unspec_for_sint; + unspec m_unspec_for_uint; }; class svcmpuo_impl : public quiet @@ -822,9 +822,9 @@ public: the source mode before the destination mode. */ if (e.type_suffix (1).integer_p) { - int unspec = (e.type_suffix (1).unsigned_p - ? UNSPEC_COND_UCVTF - : UNSPEC_COND_SCVTF); + unspec unspec = (e.type_suffix (1).unsigned_p + ? UNSPEC_COND_UCVTF + : UNSPEC_COND_SCVTF); if (e.type_suffix (0).element_bytes <= e.type_suffix (1).element_bytes) icode = (e.pred == PRED_x ? code_for_aarch64_sve_nonextend (unspec, mode1, mode0) @@ -836,9 +836,9 @@ public: } else { - int unspec = (!e.type_suffix (0).integer_p ? UNSPEC_COND_FCVT - : e.type_suffix (0).unsigned_p ? UNSPEC_COND_FCVTZU - : UNSPEC_COND_FCVTZS); + unspec unspec = (!e.type_suffix (0).integer_p ? UNSPEC_COND_FCVT + : e.type_suffix (0).unsigned_p ? UNSPEC_COND_FCVTZU + : UNSPEC_COND_FCVTZS); if (e.type_suffix (0).element_bytes >= e.type_suffix (1).element_bytes) icode = (e.pred == PRED_x ? code_for_aarch64_sve_nontrunc (unspec, mode1, mode0) @@ -991,7 +991,7 @@ public: /* Use the same ordering as the dot_prod_optab, with the accumulator last. */ e.rotate_inputs_left (0, 4); - int unspec = unspec_for (e); + unspec unspec = unspec_for (e); if (unspec == UNSPEC_FDOT) icode = CODE_FOR_aarch64_fdot_prod_lanevnx4sfvnx8hf; else @@ -1347,7 +1347,7 @@ public: with an extra argument on the end. Take the inactive elements from this extra argument. */ e.rotate_inputs_left (0, 4); - return e.map_to_rtx_codes (AND, AND, -1, -1, 3); + return e.map_to_rtx_codes (AND, AND, UNSPEC_NONE, UNSPEC_NONE, 3); } machine_mode wide_mode = e.vector_mode (0); @@ -1559,7 +1559,7 @@ public: class svlast_impl : public quiet { public: - constexpr svlast_impl (int unspec) : m_unspec (unspec) {} + constexpr svlast_impl (unspec unspec) : m_unspec (unspec) {} bool is_lasta () const { return m_unspec == UNSPEC_LASTA; } bool is_lastb () const { return m_unspec == UNSPEC_LASTB; } @@ -1689,7 +1689,7 @@ public: } /* The unspec code associated with the operation. */ - int m_unspec; + unspec m_unspec; }; class svld1_impl : public full_width_access @@ -2062,7 +2062,7 @@ public: class svldxf1_impl : public full_width_access { public: - constexpr svldxf1_impl (int unspec) : m_unspec (unspec) {} + constexpr svldxf1_impl (unspec unspec) : m_unspec (unspec) {} unsigned int call_properties (const function_instance &) const override @@ -2082,14 +2082,14 @@ public: } /* The unspec associated with the load. */ - int m_unspec; + unspec m_unspec; }; /* Implements extending contiguous forms of svldff1 and svldnf1. */ class svldxf1_extend_impl : public extending_load { public: - constexpr svldxf1_extend_impl (type_suffix_index memory_type, int unspec) + constexpr svldxf1_extend_impl (type_suffix_index memory_type, unspec unspec) : extending_load (memory_type), m_unspec (unspec) {} unsigned int @@ -2112,7 +2112,7 @@ public: } /* The unspec associated with the load. */ - int m_unspec; + unspec m_unspec; }; class svlen_impl : public quiet @@ -2484,7 +2484,7 @@ public: class svnot_impl : public rtx_code_function { public: - constexpr svnot_impl () : rtx_code_function (NOT, NOT, -1) {} + constexpr svnot_impl () : rtx_code_function (NOT, NOT, UNSPEC_NONE) {} rtx expand (function_expander &e) const override @@ -2549,7 +2549,7 @@ public: class svpfirst_svpnext_impl : public function_base { public: - constexpr svpfirst_svpnext_impl (int unspec) : m_unspec (unspec) {} + constexpr svpfirst_svpnext_impl (unspec unspec) : m_unspec (unspec) {} gimple * fold (gimple_folder &f) const override { @@ -2570,7 +2570,7 @@ public: } /* The unspec associated with the operation. */ - int m_unspec; + unspec m_unspec; }; /* Implements contiguous forms of svprf[bhwd]. */ @@ -2944,7 +2944,7 @@ public: class svrint_impl : public function_base { public: - constexpr svrint_impl (optab_tag optab, int cond_unspec) + constexpr svrint_impl (optab_tag optab, unspec cond_unspec) : m_optab (optab), m_cond_unspec (cond_unspec) {} @@ -2956,11 +2956,11 @@ public: auto icode = direct_optab_handler (m_optab, e.tuple_mode (0)); return e.use_exact_insn (icode); } - return e.map_to_unspecs (-1, -1, m_cond_unspec); + return e.map_to_unspecs (UNSPEC_NONE, UNSPEC_NONE, m_cond_unspec); } optab_tag m_optab; - int m_cond_unspec; + unspec m_cond_unspec; }; class svsel_impl : public quiet @@ -3252,7 +3252,7 @@ public: /* Canonicalize subtractions of constants to additions. */ machine_mode mode = e.vector_mode (0); if (e.try_negating_argument (2, mode)) - return e.map_to_rtx_codes (PLUS, PLUS, UNSPEC_COND_FADD, -1); + return e.map_to_rtx_codes (PLUS, PLUS, UNSPEC_COND_FADD, UNSPEC_NONE); return rtx_code_function::expand (e); } @@ -3324,14 +3324,14 @@ public: expand (function_expander &e) const override { machine_mode mode = GET_MODE (e.args[0]); - unsigned int unpacku = m_high_p ? UNSPEC_UNPACKUHI : UNSPEC_UNPACKULO; - unsigned int unpacks = m_high_p ? UNSPEC_UNPACKSHI : UNSPEC_UNPACKSLO; + unspec unpacku = m_high_p ? UNSPEC_UNPACKUHI : UNSPEC_UNPACKULO; + unspec unpacks = m_high_p ? UNSPEC_UNPACKSHI : UNSPEC_UNPACKSLO; insn_code icode; if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL) icode = code_for_aarch64_sve_punpk_acle (unpacku); else { - int unspec = e.type_suffix (0).unsigned_p ? unpacku : unpacks; + unspec unspec = e.type_suffix (0).unsigned_p ? unpacku : unpacks; icode = code_for_aarch64_sve_unpk (unspec, unspec, mode); } return e.use_exact_insn (icode); @@ -3396,7 +3396,7 @@ public: class svwhilelx_impl : public while_comparison { public: - constexpr svwhilelx_impl (int unspec_for_sint, int unspec_for_uint, bool eq_p) + constexpr svwhilelx_impl (unspec unspec_for_sint, unspec unspec_for_uint, bool eq_p) : while_comparison (unspec_for_sint, unspec_for_uint), m_eq_p (eq_p) {} @@ -3525,7 +3525,7 @@ public: expand (function_expander &e) const override { if (vectors_per_tuple (e) == 1) - return e.map_to_unspecs (-1, -1, UNSPEC_COND_FSCALE); + return e.map_to_unspecs (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FSCALE); else { machine_mode mode = GET_MODE (e.args[0]); @@ -3558,7 +3558,7 @@ FUNCTION (svand, rtx_code_function, (AND, AND)) FUNCTION (svandv, svandv_impl,) FUNCTION (svasr, rtx_code_function, (ASHIFTRT, ASHIFTRT)) FUNCTION (svasr_wide, shift_wide, (ASHIFTRT, UNSPEC_ASHIFTRT_WIDE)) -FUNCTION (svasrd, unspec_based_function, (UNSPEC_ASRD, -1, -1)) +FUNCTION (svasrd, unspec_based_function, (UNSPEC_ASRD, UNSPEC_NONE, UNSPEC_NONE)) FUNCTION (svbfdot, fixed_insn_function, (CODE_FOR_aarch64_sve_bfdotvnx4sf)) FUNCTION (svbfdot_lane, fixed_insn_function, (CODE_FOR_aarch64_sve_bfdot_lanevnx4sf)) @@ -3627,9 +3627,9 @@ FUNCTION (svdup, svdup_impl,) FUNCTION (svdup_lane, svdup_lane_impl,) FUNCTION (svdupq, svdupq_impl,) FUNCTION (svdupq_lane, svdupq_lane_impl,) -FUNCTION (sveor, rtx_code_function, (XOR, XOR, -1)) +FUNCTION (sveor, rtx_code_function, (XOR, XOR, UNSPEC_NONE)) FUNCTION (sveorv, sveorv_impl,) -FUNCTION (svexpa, unspec_based_function, (-1, -1, UNSPEC_FEXPA)) +FUNCTION (svexpa, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_FEXPA)) FUNCTION (svexpand, svexpand_impl,) FUNCTION (svext, QUIET_CODE_FOR_MODE0 (aarch64_sve_ext),) FUNCTION (svextb, svext_bhw_impl, (QImode)) @@ -3711,14 +3711,14 @@ FUNCTION (svmsb, svmsb_impl,) FUNCTION (svmul, svmul_impl,) FUNCTION (svmul_lane, CODE_FOR_MODE0 (aarch64_mul_lane),) FUNCTION (svmulh, unspec_based_function, (UNSPEC_SMUL_HIGHPART, - UNSPEC_UMUL_HIGHPART, -1)) -FUNCTION (svmulx, unspec_based_function, (-1, -1, UNSPEC_COND_FMULX)) + UNSPEC_UMUL_HIGHPART, UNSPEC_NONE)) +FUNCTION (svmulx, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FMULX)) FUNCTION (svnand, svnand_impl,) FUNCTION (svneg, quiet, (NEG, NEG, UNSPEC_COND_FNEG)) -FUNCTION (svnmad, unspec_based_function, (-1, -1, UNSPEC_COND_FNMLA)) -FUNCTION (svnmla, unspec_based_function_rotated, (-1, -1, UNSPEC_COND_FNMLA)) -FUNCTION (svnmls, unspec_based_function_rotated, (-1, -1, UNSPEC_COND_FNMLS)) -FUNCTION (svnmsb, unspec_based_function, (-1, -1, UNSPEC_COND_FNMLS)) +FUNCTION (svnmad, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FNMLA)) +FUNCTION (svnmla, unspec_based_function_rotated, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FNMLA)) +FUNCTION (svnmls, unspec_based_function_rotated, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FNMLS)) +FUNCTION (svnmsb, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FNMLS)) FUNCTION (svnor, svnor_impl,) FUNCTION (svnot, svnot_impl,) FUNCTION (svorn, svorn_impl,) @@ -3740,7 +3740,7 @@ FUNCTION (svptest_first, svptest_impl, (LT)) FUNCTION (svptest_last, svptest_impl, (LTU)) FUNCTION (svptrue, svptrue_impl,) FUNCTION (svptrue_pat, svptrue_pat_impl,) -FUNCTION (svqadd, rtx_code_function, (SS_PLUS, US_PLUS, -1)) +FUNCTION (svqadd, rtx_code_function, (SS_PLUS, US_PLUS, UNSPEC_NONE)) FUNCTION (svqdecb, svqdec_bhwd_impl, (QImode)) FUNCTION (svqdecb_pat, svqdec_bhwd_impl, (QImode)) FUNCTION (svqdecd, svqdec_bhwd_impl, (DImode)) @@ -3759,17 +3759,17 @@ FUNCTION (svqinch_pat, svqinc_bhwd_impl, (HImode)) FUNCTION (svqincp, svqdecp_svqincp_impl, (SS_PLUS, US_PLUS)) FUNCTION (svqincw, svqinc_bhwd_impl, (SImode)) FUNCTION (svqincw_pat, svqinc_bhwd_impl, (SImode)) -FUNCTION (svqsub, rtx_code_function, (SS_MINUS, US_MINUS, -1)) -FUNCTION (svrbit, rtx_code_function, (BITREVERSE, BITREVERSE, -1)) +FUNCTION (svqsub, rtx_code_function, (SS_MINUS, US_MINUS, UNSPEC_NONE)) +FUNCTION (svrbit, rtx_code_function, (BITREVERSE, BITREVERSE, UNSPEC_NONE)) FUNCTION (svrdffr, svrdffr_impl,) -FUNCTION (svrecpe, unspec_based_function, (-1, UNSPEC_URECPE, UNSPEC_FRECPE)) -FUNCTION (svrecps, unspec_based_function, (-1, -1, UNSPEC_FRECPS)) -FUNCTION (svrecpx, unspec_based_function, (-1, -1, UNSPEC_COND_FRECPX)) +FUNCTION (svrecpe, unspec_based_function, (UNSPEC_NONE, UNSPEC_URECPE, UNSPEC_FRECPE)) +FUNCTION (svrecps, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_FRECPS)) +FUNCTION (svrecpx, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_COND_FRECPX)) FUNCTION (svreinterpret, svreinterpret_impl,) FUNCTION (svrev, svrev_impl,) -FUNCTION (svrevb, unspec_based_function, (UNSPEC_REVB, UNSPEC_REVB, -1)) -FUNCTION (svrevh, unspec_based_function, (UNSPEC_REVH, UNSPEC_REVH, -1)) -FUNCTION (svrevw, unspec_based_function, (UNSPEC_REVW, UNSPEC_REVW, -1)) +FUNCTION (svrevb, unspec_based_function, (UNSPEC_REVB, UNSPEC_REVB, UNSPEC_NONE)) +FUNCTION (svrevh, unspec_based_function, (UNSPEC_REVH, UNSPEC_REVH, UNSPEC_NONE)) +FUNCTION (svrevw, unspec_based_function, (UNSPEC_REVW, UNSPEC_REVW, UNSPEC_NONE)) FUNCTION (svrinta, svrint_impl, (round_optab, UNSPEC_COND_FRINTA)) FUNCTION (svrinti, svrint_impl, (nearbyint_optab, UNSPEC_COND_FRINTI)) FUNCTION (svrintm, svrint_impl, (floor_optab, UNSPEC_COND_FRINTM)) @@ -3777,8 +3777,8 @@ FUNCTION (svrintn, svrint_impl, (roundeven_optab, UNSPEC_COND_FRINTN)) FUNCTION (svrintp, svrint_impl, (ceil_optab, UNSPEC_COND_FRINTP)) FUNCTION (svrintx, svrint_impl, (rint_optab, UNSPEC_COND_FRINTX)) FUNCTION (svrintz, svrint_impl, (btrunc_optab, UNSPEC_COND_FRINTZ)) -FUNCTION (svrsqrte, unspec_based_function, (-1, UNSPEC_RSQRTE, UNSPEC_RSQRTE)) -FUNCTION (svrsqrts, unspec_based_function, (-1, -1, UNSPEC_RSQRTS)) +FUNCTION (svrsqrte, unspec_based_function, (UNSPEC_NONE, UNSPEC_RSQRTE, UNSPEC_RSQRTE)) +FUNCTION (svrsqrts, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_RSQRTS)) FUNCTION (svscale, svscale_impl,) FUNCTION (svsel, svsel_impl,) FUNCTION (svset2, svset_impl, (2)) @@ -3802,7 +3802,7 @@ FUNCTION (svstnt1, svstnt1_impl,) FUNCTION (svsub, svsub_impl,) FUNCTION (svsubr, rtx_code_function_rotated, (MINUS, MINUS, UNSPEC_COND_FSUB)) FUNCTION (svsudot, svusdot_impl, (true)) -FUNCTION (svsudot_lane, svdotprod_lane_impl, (UNSPEC_SUDOT, -1, -1)) +FUNCTION (svsudot_lane, svdotprod_lane_impl, (UNSPEC_SUDOT, UNSPEC_NONE, UNSPEC_NONE)) FUNCTION (svtbl, quiet, (UNSPEC_TBL, UNSPEC_TBL, UNSPEC_TBL)) FUNCTION (svtmad, CODE_FOR_MODE0 (aarch64_sve_tmad),) @@ -3812,8 +3812,8 @@ FUNCTION (svtrn1q, unspec_based_function, (UNSPEC_TRN1Q, UNSPEC_TRN1Q, FUNCTION (svtrn2, svtrn_impl, (1)) FUNCTION (svtrn2q, unspec_based_function, (UNSPEC_TRN2Q, UNSPEC_TRN2Q, UNSPEC_TRN2Q)) -FUNCTION (svtsmul, unspec_based_function, (-1, -1, UNSPEC_FTSMUL)) -FUNCTION (svtssel, unspec_based_function, (-1, -1, UNSPEC_FTSSEL)) +FUNCTION (svtsmul, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_FTSMUL)) +FUNCTION (svtssel, unspec_based_function, (UNSPEC_NONE, UNSPEC_NONE, UNSPEC_FTSSEL)) FUNCTION (svundef, svundef_impl, (1)) FUNCTION (svundef2, svundef_impl, (2)) FUNCTION (svundef3, svundef_impl, (3)) @@ -3821,8 +3821,8 @@ FUNCTION (svundef4, svundef_impl, (4)) FUNCTION (svunpkhi, svunpk_impl, (true)) FUNCTION (svunpklo, svunpk_impl, (false)) FUNCTION (svusdot, svusdot_impl, (false)) -FUNCTION (svusdot_lane, svdotprod_lane_impl, (UNSPEC_USDOT, -1, -1)) -FUNCTION (svusmmla, unspec_based_add_function, (UNSPEC_USMATMUL, -1, -1)) +FUNCTION (svusdot_lane, svdotprod_lane_impl, (UNSPEC_USDOT, UNSPEC_NONE, UNSPEC_NONE)) +FUNCTION (svusmmla, unspec_based_add_function, (UNSPEC_USMATMUL, UNSPEC_NONE, UNSPEC_NONE)) FUNCTION (svuzp1, svuzp_impl, (0)) FUNCTION (svuzp1q, unspec_based_function, (UNSPEC_UZP1Q, UNSPEC_UZP1Q, UNSPEC_UZP1Q)) diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h index d305d2de0eb..2fdb2fd62f2 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h +++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h @@ -203,8 +203,8 @@ class rtx_code_function_base : public function_base public: constexpr rtx_code_function_base (rtx_code code_for_sint, rtx_code code_for_uint, - int unspec_for_cond_fp = -1, - int unspec_for_uncond_fp = -1) + unspec unspec_for_cond_fp = UNSPEC_NONE, + unspec unspec_for_uncond_fp = UNSPEC_NONE) : m_code_for_sint (code_for_sint), m_code_for_uint (code_for_uint), m_unspec_for_cond_fp (unspec_for_cond_fp), m_unspec_for_uncond_fp (unspec_for_uncond_fp) {} @@ -216,11 +216,11 @@ public: /* The UNSPEC_COND_* to use for floating-point operations. Can be -1 for functions that only operate on integers. */ - int m_unspec_for_cond_fp; + unspec m_unspec_for_cond_fp; /* The UNSPEC_* to use for unpredicated floating-point operations. Can be -1 if there is no such operation. */ - int m_unspec_for_uncond_fp; + unspec m_unspec_for_uncond_fp; }; /* A function_base for functions that have an associated rtx code. @@ -267,10 +267,10 @@ public: class unspec_based_function_base : public function_base { public: - constexpr unspec_based_function_base (int unspec_for_sint, - int unspec_for_uint, - int unspec_for_fp, - int unspec_for_mfp8 = -1, + constexpr unspec_based_function_base (unspec unspec_for_sint, + unspec unspec_for_uint, + unspec unspec_for_fp, + unspec unspec_for_mfp8 = UNSPEC_NONE, unsigned int suffix_index = 0) : m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint), @@ -280,7 +280,7 @@ public: {} /* Return the unspec code to use for INSTANCE, based on type suffix 0. */ - int + unspec unspec_for (const function_instance &instance) const { if (instance.fpm_mode == FPM_set) @@ -294,10 +294,10 @@ public: /* The unspec code associated with signed-integer, unsigned-integer and floating-point operations respectively. */ - int m_unspec_for_sint; - int m_unspec_for_uint; - int m_unspec_for_fp; - int m_unspec_for_mfp8; + unspec m_unspec_for_sint; + unspec m_unspec_for_uint; + unspec m_unspec_for_fp; + unspec m_unspec_for_mfp8; /* Which type suffix is used to choose between the unspecs. */ unsigned int m_suffix_index; @@ -402,7 +402,7 @@ typedef unspec_based_function_exact_insn class cond_or_uncond_unspec_function : public function_base { public: - constexpr cond_or_uncond_unspec_function (int cond_unspec, int uncond_unspec) + constexpr cond_or_uncond_unspec_function (unspec cond_unspec, unspec uncond_unspec) : m_cond_unspec (cond_unspec), m_uncond_unspec (uncond_unspec) {} rtx @@ -421,8 +421,8 @@ public: /* The unspecs for the conditional and unconditional instructions, respectively. */ - int m_cond_unspec; - int m_uncond_unspec; + unspec m_cond_unspec; + unspec m_uncond_unspec; }; /* General SME unspec-based functions, parameterized on the vector mode. */ @@ -431,9 +431,9 @@ class sme_1mode_function : public read_write_za public: using parent = read_write_za; - constexpr sme_1mode_function (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp) - : parent (unspec_for_sint, unspec_for_uint, unspec_for_fp, -1, 1) + constexpr sme_1mode_function (unspec unspec_for_sint, unspec unspec_for_uint, + unspec unspec_for_fp) + : parent (unspec_for_sint, unspec_for_uint, unspec_for_fp, UNSPEC_NONE, 1) {} rtx @@ -461,8 +461,8 @@ class sme_2mode_function_t : public read_write_za public: using parent = read_write_za; - constexpr sme_2mode_function_t (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp, int unspec_for_mfp8 = -1) + constexpr sme_2mode_function_t (unspec unspec_for_sint, unspec unspec_for_uint, + unspec unspec_for_fp, unspec unspec_for_mfp8 = UNSPEC_NONE) : parent (unspec_for_sint, unspec_for_uint, unspec_for_fp, unspec_for_mfp8, 1) {} @@ -488,8 +488,8 @@ class svvdot_half_impl : public read_write_za public: using parent = read_write_za; - constexpr svvdot_half_impl (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp, int unspec_for_mfp8) + constexpr svvdot_half_impl (unspec unspec_for_sint, unspec unspec_for_uint, + unspec unspec_for_fp, unspec unspec_for_mfp8) : parent (unspec_for_sint, unspec_for_uint, unspec_for_fp, unspec_for_mfp8, 1) {} @@ -519,7 +519,7 @@ public: rtx expand (function_expander &e) const override { - int unspec = unspec_for (e); + unspec unspec = unspec_for (e); insn_code icode; if (e.type_suffix (m_suffix_index).float_p && e.fpm_mode != FPM_set) @@ -550,7 +550,7 @@ public: rtx expand (function_expander &e) const override { - int unspec = unspec_for (e); + unspec unspec = unspec_for (e); insn_code icode; if (e.type_suffix (m_suffix_index).float_p && e.fpm_mode != FPM_set) @@ -644,7 +644,7 @@ public: class binary_permute : public permute { public: - constexpr binary_permute (int unspec) : m_unspec (unspec) {} + constexpr binary_permute (unspec unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -657,7 +657,7 @@ public: } /* The unspec code associated with the operation. */ - int m_unspec; + unspec m_unspec; }; /* A function that implements a x2 or x4 permute instruction. Both forms @@ -666,7 +666,7 @@ public: class multireg_permute : public function_base { public: - constexpr multireg_permute (int unspec) : m_unspec (unspec) {} + constexpr multireg_permute (unspec unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -684,7 +684,7 @@ public: } /* The unspec associated with the permutation. */ - int m_unspec; + unspec m_unspec; }; /* A function that has two type integer type suffixes, which might agree @@ -693,8 +693,8 @@ public: class integer_conversion : public function_base { public: - constexpr integer_conversion (int unspec_for_sint, int unspec_for_sintu, - int unspec_for_uint, int unspec_for_uints) + constexpr integer_conversion (unspec unspec_for_sint, unspec unspec_for_sintu, + unspec unspec_for_uint, unspec unspec_for_uints) : m_unspec_for_sint (unspec_for_sint), m_unspec_for_sintu (unspec_for_sintu), m_unspec_for_uint (unspec_for_uint), @@ -706,7 +706,7 @@ public: { machine_mode mode0 = e.vector_mode (0); machine_mode mode1 = GET_MODE (e.args[0]); - int unspec; + unspec unspec; if (e.type_suffix (0).unsigned_p == e.type_suffix (1).unsigned_p) unspec = (e.type_suffix (0).unsigned_p ? m_unspec_for_uint @@ -719,30 +719,30 @@ public: } /* The unspec for signed -> signed. */ - int m_unspec_for_sint; + unspec m_unspec_for_sint; /* The unspec for signed -> unsigned. */ - int m_unspec_for_sintu; + unspec m_unspec_for_sintu; /* The unspec for unsigned -> signed. */ - int m_unspec_for_uint; + unspec m_unspec_for_uint; /* The unspec for unsigned -> unsigned. */ - int m_unspec_for_uints; + unspec m_unspec_for_uints; }; /* A function_base for functions that reduce a vector to a scalar. */ class reduction : public function_base { public: - constexpr reduction (int unspec) + constexpr reduction (unspec unspec) : m_unspec_for_sint (unspec), m_unspec_for_uint (unspec), m_unspec_for_fp (unspec) {} - constexpr reduction (int unspec_for_sint, int unspec_for_uint, - int unspec_for_fp) + constexpr reduction (unspec unspec_for_sint, unspec unspec_for_uint, + unspec unspec_for_fp) : m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint), m_unspec_for_fp (unspec_for_fp) @@ -752,9 +752,9 @@ public: expand (function_expander &e) const override { machine_mode mode = e.vector_mode (0); - int unspec = (!e.type_suffix (0).integer_p ? m_unspec_for_fp - : e.type_suffix (0).unsigned_p ? m_unspec_for_uint - : m_unspec_for_sint); + unspec unspec = (!e.type_suffix (0).integer_p ? m_unspec_for_fp + : e.type_suffix (0).unsigned_p ? m_unspec_for_uint + : m_unspec_for_sint); /* There's no distinction between SADDV and UADDV for 64-bit elements; the signed versions only exist for narrower elements. */ if (GET_MODE_UNIT_BITSIZE (mode) == 64 && unspec == UNSPEC_SADDV) @@ -764,9 +764,9 @@ public: /* The unspec code associated with signed-integer, unsigned-integer and floating-point operations respectively. */ - int m_unspec_for_sint; - int m_unspec_for_uint; - int m_unspec_for_fp; + unspec m_unspec_for_sint; + unspec m_unspec_for_uint; + unspec m_unspec_for_fp; }; /* A function_base for functions that shift narrower-than-64-bit values @@ -789,7 +789,7 @@ public: if (aarch64_simd_shift_imm_p (shift, elem_mode, m_code == ASHIFT)) { e.args.last () = shift; - return e.map_to_rtx_codes (m_code, m_code, -1, -1); + return e.map_to_rtx_codes (m_code, m_code, UNSPEC_NONE, UNSPEC_NONE); } if (e.pred == PRED_x) @@ -832,7 +832,7 @@ public: class while_comparison : public function_base { public: - constexpr while_comparison (int unspec_for_sint, int unspec_for_uint) + constexpr while_comparison (unspec unspec_for_sint, unspec unspec_for_uint) : m_unspec_for_sint (unspec_for_sint), m_unspec_for_uint (unspec_for_uint) {} @@ -842,7 +842,7 @@ public: { /* Suffix 0 determines the predicate mode, suffix 1 determines the scalar mode and signedness. */ - int unspec = (e.type_suffix (1).unsigned_p + unspec unspec = (e.type_suffix (1).unsigned_p ? m_unspec_for_uint : m_unspec_for_sint); if (e.vectors_per_tuple () > 1) @@ -866,8 +866,8 @@ public: /* The unspec codes associated with signed and unsigned operations respectively. */ - int m_unspec_for_sint; - int m_unspec_for_uint; + unspec m_unspec_for_sint; + unspec m_unspec_for_uint; }; template diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc index dae535c7656..65972f6559e 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc @@ -60,7 +60,7 @@ public: class read_write_za_base : public function_base { public: - constexpr read_write_za_base (int unspec) : m_unspec (unspec) {} + constexpr read_write_za_base (unspec unspec) : m_unspec (unspec) {} rtx expand (function_expander &e) const override @@ -73,7 +73,7 @@ public: return e.use_exact_insn (icode); } - int m_unspec; + unspec m_unspec; }; using load_za_base = add_call_properties, (UNSPEC_TBLQ, UNSPEC_TBLQ, diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index d19ca305d82..3041a6ee62a 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -7265,7 +7265,7 @@ aarch64_replace_reg_mode (rtx x, machine_mode mode) /* Return the SVE REV[BHW] unspec for reversing quantities of mode MODE stored in wider integer containers. */ -static unsigned int +static unspec aarch64_sve_rev_unspec (machine_mode mode) { switch (GET_MODE_UNIT_SIZE (mode)) @@ -7292,7 +7292,7 @@ aarch64_split_sve_subreg_move (rtx dest, rtx ptrue, rtx src) < GET_MODE_UNIT_SIZE (mode_with_narrower_elts)) std::swap (mode_with_wider_elts, mode_with_narrower_elts); - unsigned int unspec = aarch64_sve_rev_unspec (mode_with_narrower_elts); + unspec unspec = aarch64_sve_rev_unspec (mode_with_narrower_elts); machine_mode pred_mode = aarch64_sve_pred_mode (mode_with_wider_elts); /* Get the operands in the appropriate modes and emit the instruction. */ @@ -9615,7 +9615,7 @@ aarch_pac_insn_p (rtx x) rtx sub = *iter; if (sub && GET_CODE (sub) == UNSPEC) { - int unspec_val = XINT (sub, 1); + unspec unspec_val = (unspec) XINT (sub, 1); switch (unspec_val) { case UNSPEC_PACIASP: @@ -28342,7 +28342,7 @@ aarch64_evpc_hvla (struct expand_vec_perm_d *d) return false; /* Used once we have verified that we can use UNSPEC to do the operation. */ - auto use_binary = [&](int unspec) -> bool + auto use_binary = [&](unspec unspec) -> bool { if (!d->testing_p) { diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 59af2bd2088..168a8a471fe 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -223,6 +223,7 @@ ) (define_c_enum "unspec" [ + UNSPEC_NONE ;; Sentinel value for invalid or missing unspecs UNSPEC_AUTIA1716 UNSPEC_AUTIB1716 UNSPEC_AUTIASP