From: Andrew Stubbs <ams@baylibre.com>
Date: Fri, 24 Oct 2025 10:41:40 +0000 (+0000)
Subject: amdgcn: Implement vector ABS_EXPR for integers (PR104116)
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=71c158ad22df895c379a2f539fde0f76d421e0be;p=thirdparty%2Fgcc.git

amdgcn: Implement vector ABS_EXPR for integers (PR104116)

There's not a single vector instruction for integer absolute, but this
enables the optimization in PR104116, and is probably useful otherwise.

The pr104116-*.c testcases should now pass on amdgcn.

gcc/ChangeLog:

	PR tree-optimization/104116
	* config/gcn/gcn-valu.md (abs<mode>2): New define_expand for
	integer vector modes.
---

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index a34d2e30c97..96c183d67b6 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -3128,6 +3128,20 @@
   }
   [(set_attr "type" "mult")])
 
+(define_expand "abs<mode>2"
+  [(set (match_operand:V_INT 0 "register_operand")
+        (abs:V_INT (match_operand:V_INT 1 "register_operand")))]
+  ""
+  {
+    rtx vcc = gen_reg_rtx (DImode);
+    rtx zero = gcn_vec_constant (<MODE>mode, 0);
+    emit_insn (gen_vec_cmp<mode>di (vcc, gen_rtx_LT (VOIDmode, 0, 0),
+				    operands[1], zero));
+    emit_insn (gen_sub<mode>3_exec (operands[0], zero, operands[1],
+				    operands[1], vcc));
+    DONE;
+  })
+
 ;; }}}
 ;; {{{ FP binops - special cases