From: Cameron Cawley Date: Thu, 29 Feb 2024 18:34:01 +0000 (+0000) Subject: Rename most ACLE references to ARMv8 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=721c488aff83380f38f84f3de78df19b8b4569d5;p=thirdparty%2Fzlib-ng.git Rename most ACLE references to ARMv8 --- diff --git a/.github/workflows/cmake.yml b/.github/workflows/cmake.yml index 90e222a6..d1ddb0f2 100644 --- a/.github/workflows/cmake.yml +++ b/.github/workflows/cmake.yml @@ -170,13 +170,13 @@ jobs: gcov-exec: arm-linux-gnueabihf-gcov codecov: ubuntu_gcc_armhf - - name: Ubuntu GCC ARM HF No ACLE ASAN + - name: Ubuntu GCC ARM HF No ARMv8 ASAN os: ubuntu-latest - cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-armhf.cmake -DWITH_ACLE=OFF -DWITH_SANITIZER=Address + cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-armhf.cmake -DWITH_ARMV8=OFF -DWITH_SANITIZER=Address asan-options: detect_leaks=0 packages: qemu-user crossbuild-essential-armhf gcov-exec: arm-linux-gnueabihf-gcov - codecov: ubuntu_gcc_armhf_no_acle + codecov: ubuntu_gcc_armhf_no_armv8 - name: Ubuntu GCC ARM HF No NEON ASAN os: ubuntu-latest @@ -201,12 +201,12 @@ jobs: gcov-exec: aarch64-linux-gnu-gcov codecov: ubuntu_gcc_aarch64 - - name: Ubuntu GCC AARCH64 No ACLE UBSAN + - name: Ubuntu GCC AARCH64 No ARMv8 UBSAN os: ubuntu-22.04 - cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-aarch64.cmake -DWITH_ACLE=OFF -DWITH_SANITIZER=Undefined + cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-aarch64.cmake -DWITH_ARMV8=OFF -DWITH_SANITIZER=Undefined packages: qemu-user gcc-aarch64-linux-gnu g++-aarch64-linux-gnu libc-dev-arm64-cross gcov-exec: aarch64-linux-gnu-gcov - codecov: ubuntu_gcc_aarch64_no_acle + codecov: ubuntu_gcc_aarch64_no_armv8 - name: Ubuntu GCC AARCH64 No NEON UBSAN os: ubuntu-22.04 diff --git a/.github/workflows/configure.yml b/.github/workflows/configure.yml index 6643edb1..31d5206c 100644 --- a/.github/workflows/configure.yml +++ b/.github/workflows/configure.yml @@ -54,10 +54,10 @@ jobs: chost: arm-linux-gnueabihf packages: qemu-user gcc-arm-linux-gnueabihf libc-dev-armel-cross - - name: Ubuntu GCC ARM HF No ACLE + - name: Ubuntu GCC ARM HF No ARMv8 os: ubuntu-latest compiler: arm-linux-gnueabihf-gcc - configure-args: --warn --without-acle + configure-args: --warn --without-armv8 chost: arm-linux-gnueabihf packages: qemu-user gcc-arm-linux-gnueabihf libc-dev-armel-cross @@ -82,10 +82,10 @@ jobs: chost: aarch64-linux-gnu packages: qemu-user gcc-aarch64-linux-gnu libc-dev-arm64-cross - - name: Ubuntu GCC AARCH64 No ACLE + - name: Ubuntu GCC AARCH64 No ARMv8 os: ubuntu-latest compiler: aarch64-linux-gnu-gcc - configure-args: --warn --without-acle + configure-args: --warn --without-armv8 chost: aarch64-linux-gnu packages: qemu-user gcc-aarch64-linux-gnu libc-dev-arm64-cross diff --git a/CMakeLists.txt b/CMakeLists.txt index 36741306..64dd7ad4 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -103,7 +103,7 @@ set(WITH_SANITIZER AUTO CACHE STRING "Enable sanitizer support") set_property(CACHE WITH_SANITIZER PROPERTY STRINGS "Memory" "Address" "Undefined" "Thread") if(BASEARCH_ARM_FOUND) - option(WITH_ACLE "Build with ACLE" ON) + option(WITH_ARMV8 "Build with ARMv8 CRC32 intrinsics" ON) option(WITH_NEON "Build with NEON intrinsics" ON) cmake_dependent_option(WITH_ARMV6 "Build with ARMv6 SIMD" ON "NOT ARCH MATCHES \"aarch64\"" OFF) elseif(BASEARCH_PPC_FOUND) @@ -132,7 +132,7 @@ option(INSTALL_UTILS "Copy minigzip and minideflate during install" OFF) mark_as_advanced(FORCE ZLIB_SYMBOL_PREFIX WITH_REDUCED_MEM - WITH_ACLE WITH_NEON + WITH_ARMV8 WITH_NEON WITH_ARMV6 WITH_DFLTCC_DEFLATE WITH_DFLTCC_INFLATE @@ -711,19 +711,19 @@ if(WITH_OPTIM) list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/arm_features.c) endif() - if(WITH_ACLE) - check_acle_compiler_flag() - if(HAVE_ACLE_FLAG) - add_definitions(-DARM_ACLE) - set(ACLE_SRCS ${ARCHDIR}/crc32_acle.c) - set_property(SOURCE ${ACLE_SRCS} PROPERTY COMPILE_FLAGS "${ACLEFLAG} ${NOLTOFLAG}") - list(APPEND ZLIB_ARCH_SRCS ${ACLE_SRCS}) - add_feature_info(ACLE_CRC 1 "Support ACLE optimized CRC hash generation, using \"${ACLEFLAG}\"") + if(WITH_ARMV8) + check_armv8_compiler_flag() + if(HAVE_ARMV8_FLAG) + add_definitions(-DARM_CRC32) + set(ARMV8_SRCS ${ARCHDIR}/crc32_armv8.c) + set_property(SOURCE ${ARMV8_SRCS} PROPERTY COMPILE_FLAGS "${ARMV8FLAG} ${NOLTOFLAG}") + list(APPEND ZLIB_ARCH_SRCS ${ARMV8_SRCS}) + add_feature_info(ARMV8_CRC 1 "Support ARMv8 optimized CRC hash generation, using \"${ARMV8FLAG}\"") else() - set(WITH_ACLE OFF) + set(WITH_ARMV8 OFF) endif() else() - set(WITH_ACLE OFF) + set(WITH_ARMV8 OFF) endif() if(WITH_NEON) check_neon_compiler_flag() @@ -1389,7 +1389,7 @@ add_feature_info(WITH_INFLATE_STRICT WITH_INFLATE_STRICT "Build with strict infl add_feature_info(WITH_INFLATE_ALLOW_INVALID_DIST WITH_INFLATE_ALLOW_INVALID_DIST "Build with zero fill for inflate invalid distances") if(BASEARCH_ARM_FOUND) - add_feature_info(WITH_ACLE WITH_ACLE "Build with ACLE") + add_feature_info(WITH_ARMV8 WITH_ARMV8 "Build with ARMv8 CRC32 intrinsics") add_feature_info(WITH_NEON WITH_NEON "Build with NEON intrinsics") add_feature_info(WITH_ARMV6 WITH_ARMV6 "Build with ARMv6 SIMD") elseif(BASEARCH_PPC_FOUND) diff --git a/README.md b/README.md index 28aad7f1..bcf8bc84 100644 --- a/README.md +++ b/README.md @@ -20,7 +20,7 @@ Features * Deflate medium and quick algorithms based on Intel’s zlib fork * Support for CPU intrinsics when available * Adler32 implementation using SSSE3, AVX2, AVX512, AVX512-VNNI, Neon, VMX & VSX - * CRC32-B implementation using PCLMULQDQ, VPCLMULQDQ, ACLE, & IBM Z + * CRC32-B implementation using PCLMULQDQ, VPCLMULQDQ, ARMv8, & IBM Z * Slide hash implementations using SSE2, AVX2, ARMv6, Neon, VMX & VSX * Compare256 implementations using SSE2, AVX2, Neon, POWER9 & RVV * Inflate chunk copying using SSE2, SSSE3, AVX, Neon & VSX @@ -204,7 +204,7 @@ Advanced Build Options | WITH_SSE42 | | Build with SSE42 intrinsics | ON | | WITH_PCLMULQDQ | | Build with PCLMULQDQ intrinsics | ON | | WITH_VPCLMULQDQ | --without-vpclmulqdq | Build with VPCLMULQDQ intrinsics | ON | -| WITH_ACLE | --without-acle | Build with ACLE intrinsics | ON | +| WITH_ARMV8 | --without-armv8 | Build with ARMv8 intrinsics | ON | | WITH_NEON | --without-neon | Build with NEON intrinsics | ON | | WITH_ARMV6 | --without-armv6 | Build with ARMv6 intrinsics | ON | | WITH_ALTIVEC | --without-altivec | Build with AltiVec (VMX) intrinsics | ON | diff --git a/arch/arm/Makefile.in b/arch/arm/Makefile.in index b6f0aaf2..08d986b1 100644 --- a/arch/arm/Makefile.in +++ b/arch/arm/Makefile.in @@ -8,7 +8,7 @@ SFLAGS= INCLUDES= SUFFIX= -ACLEFLAG= +ARMV8FLAG= NEONFLAG= ARMV6FLAG= NOLTOFLAG= @@ -22,7 +22,7 @@ all: \ arm_features.o arm_features.lo \ chunkset_neon.o chunkset_neon.lo \ compare256_neon.o compare256_neon.lo \ - crc32_acle.o crc32_acle.lo \ + crc32_armv8.o crc32_armv8.lo \ slide_hash_neon.o slide_hash_neon.lo \ slide_hash_armv6.o slide_hash_armv6.lo \ @@ -50,11 +50,11 @@ compare256_neon.o: compare256_neon.lo: $(CC) $(SFLAGS) $(NEONFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/compare256_neon.c -crc32_acle.o: - $(CC) $(CFLAGS) $(ACLEFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_acle.c +crc32_armv8.o: + $(CC) $(CFLAGS) $(ARMV8FLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_armv8.c -crc32_acle.lo: - $(CC) $(SFLAGS) $(ACLEFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_acle.c +crc32_armv8.lo: + $(CC) $(SFLAGS) $(ARMV8FLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_armv8.c slide_hash_neon.o: $(CC) $(CFLAGS) $(NEONFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/slide_hash_neon.c diff --git a/arch/arm/acle_intrins.h b/arch/arm/acle_intrins.h index a67cf3aa..cc4faa9c 100644 --- a/arch/arm/acle_intrins.h +++ b/arch/arm/acle_intrins.h @@ -8,7 +8,7 @@ # include #endif -#ifdef ARM_ACLE +#ifdef ARM_CRC32 #if defined(__aarch64__) # define Z_TARGET_CRC Z_TARGET("+crc") #else diff --git a/arch/arm/arm_features.c b/arch/arm/arm_features.c index d0d49764..d591a3bd 100644 --- a/arch/arm/arm_features.c +++ b/arch/arm/arm_features.c @@ -52,7 +52,7 @@ static int arm_has_crc32() { && hascrc32 == 1; #elif defined(_WIN32) return IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE); -#elif defined(ARM_NOCHECK_ACLE) +#elif defined(ARM_NOCHECK_CRC32) return 1; #else return 0; diff --git a/arch/arm/arm_functions.h b/arch/arm/arm_functions.h index b256c37b..2344b140 100644 --- a/arch/arm/arm_functions.h +++ b/arch/arm/arm_functions.h @@ -19,8 +19,8 @@ void slide_hash_neon(deflate_state *s); void inflate_fast_neon(PREFIX3(stream) *strm, uint32_t start); #endif -#ifdef ARM_ACLE -uint32_t crc32_acle(uint32_t crc, const uint8_t *buf, size_t len); +#ifdef ARM_CRC32 +uint32_t crc32_armv8(uint32_t crc, const uint8_t *buf, size_t len); #endif #ifdef ARM_SIMD @@ -55,10 +55,10 @@ void slide_hash_armv6(deflate_state *s); # define native_longest_match_slow longest_match_slow_neon # endif # endif -// ARM - ACLE -# if defined(ARM_ACLE) && (defined(__ARM_ACLE) || defined(__ARM_FEATURE_CRC32)) +// ARM - CRC32 +# if (defined(ARM_CRC32) && defined(__ARM_FEATURE_CRC32)) # undef native_crc32 -# define native_crc32 crc32_acle +# define native_crc32 crc32_armv8 # endif #endif diff --git a/arch/arm/crc32_acle.c b/arch/arm/crc32_armv8.c similarity index 90% rename from arch/arm/crc32_acle.c rename to arch/arm/crc32_armv8.c index a3a1fefc..c3561d51 100644 --- a/arch/arm/crc32_acle.c +++ b/arch/arm/crc32_armv8.c @@ -1,15 +1,15 @@ -/* crc32_acle.c -- compute the CRC-32 of a data stream +/* crc32_armv8.c -- compute the CRC-32 of a data stream * Copyright (C) 1995-2006, 2010, 2011, 2012 Mark Adler * Copyright (C) 2016 Yang Zhang * For conditions of distribution and use, see copyright notice in zlib.h * */ -#ifdef ARM_ACLE +#if defined(ARM_CRC32) #include "acle_intrins.h" #include "zbuild.h" -Z_INTERNAL Z_TARGET_CRC uint32_t crc32_acle(uint32_t crc, const uint8_t *buf, size_t len) { +Z_INTERNAL Z_TARGET_CRC uint32_t crc32_armv8(uint32_t crc, const uint8_t *buf, size_t len) { Z_REGISTER uint32_t c; Z_REGISTER uint16_t buf2; Z_REGISTER uint32_t buf4; diff --git a/cmake/detect-intrinsics.cmake b/cmake/detect-intrinsics.cmake index b96ac0a4..e7498e27 100644 --- a/cmake/detect-intrinsics.cmake +++ b/cmake/detect-intrinsics.cmake @@ -1,22 +1,22 @@ # detect-intrinsics.cmake -- Detect compiler intrinsics support # Licensed under the Zlib license, see LICENSE.md for details -macro(check_acle_compiler_flag) +macro(check_armv8_compiler_flag) if(NOT NATIVEFLAG) if(CMAKE_C_COMPILER_ID MATCHES "GNU" OR CMAKE_C_COMPILER_ID MATCHES "Clang") check_c_compiler_flag("-march=armv8-a+crc" HAVE_MARCH_ARMV8_CRC) if(HAVE_MARCH_ARMV8_CRC) - set(ACLEFLAG "-march=armv8-a+crc" CACHE INTERNAL "Compiler option to enable ACLE support") + set(ARMV8FLAG "-march=armv8-a+crc" CACHE INTERNAL "Compiler option to enable ARMv8 support") else() check_c_compiler_flag("-march=armv8-a+crc+simd" HAVE_MARCH_ARMV8_CRC_SIMD) if(HAVE_MARCH_ARMV8_CRC_SIMD) - set(ACLEFLAG "-march=armv8-a+crc+simd" CACHE INTERNAL "Compiler option to enable ACLE support") + set(ARMV8FLAG "-march=armv8-a+crc+simd" CACHE INTERNAL "Compiler option to enable ARMv8 support") endif() endif() endif() endif() # Check whether compiler supports ARMv8 CRC intrinsics - set(CMAKE_REQUIRED_FLAGS "${ACLEFLAG} ${NATIVEFLAG} ${ZNOLTOFLAG}") + set(CMAKE_REQUIRED_FLAGS "${ARMV8FLAG} ${NATIVEFLAG} ${ZNOLTOFLAG}") check_c_source_compiles( "#if defined(_MSC_VER) #include @@ -27,7 +27,7 @@ macro(check_acle_compiler_flag) return __crc32w(a, b); } int main(void) { return 0; }" - HAVE_ACLE_FLAG + HAVE_ARMV8_FLAG ) set(CMAKE_REQUIRED_FLAGS) endmacro() diff --git a/configure b/configure index 3487d092..a092e8ec 100755 --- a/configure +++ b/configure @@ -92,7 +92,7 @@ cover=0 build32=0 build64=0 buildvpclmulqdq=1 -buildacle=1 +buildarmv8=1 buildarmv6=1 buildaltivec=1 buildpower8=1 @@ -114,7 +114,7 @@ sse42flag="-msse4.2" pclmulflag="-mpclmul" vpclmulflag="-mvpclmulqdq -mavx512f" xsaveflag="-mxsave" -acleflag= +armv8flag= neonflag= armv6flag= noltoflag="-fno-lto" @@ -166,7 +166,7 @@ case "$1" in echo ' [--without-gzfileops] Compiles without the gzfile parts of the API enabled' | tee -a configure.log echo ' [--without-optimizations] Compiles without support for optional instruction sets' | tee -a configure.log echo ' [--without-new-strategies] Compiles without using new additional deflate strategies' | tee -a configure.log - echo ' [--without-acle] Compiles without ARM C Language Extensions' | tee -a configure.log + echo ' [--without-armv8] Compiles without ARMv8 CRC32 instruction set' | tee -a configure.log echo ' [--without-neon] Compiles without ARM Neon SIMD instruction set' | tee -a configure.log echo ' [--without-armv6] Compiles without ARMv6 SIMD instruction set' | tee -a configure.log echo ' [--without-altivec] Compiles without PPC AltiVec support' | tee -a configure.log @@ -198,7 +198,7 @@ case "$1" in -3* | --32) build32=1; shift ;; -6* | --64) build64=1; shift ;; --without-vpclmulqdq) buildvpclmulqdq=0; shift ;; - --without-acle) buildacle=0; shift ;; + --without-armv8) buildarmv8=0; shift ;; --without-neon) buildneon=0; shift ;; --without-armv6) buildarmv6=0; shift ;; --without-altivec) buildaltivec=0 ; shift ;; @@ -1121,19 +1121,19 @@ EOF fi } -check_acle_compiler_flag() { +check_armv8_compiler_flag() { # Check whether -march=armv8-a+crc works correctly cat > $test.c << EOF int main() { return 0; } EOF if try $CC -c $CFLAGS -march=armv8-a+crc $test.c; then echo "Check whether -march=armv8-a+crc works ... Yes." | tee -a configure.log - acleflag="-march=armv8-a+crc" + armv8flag="-march=armv8-a+crc" else echo "Check whether -march=armv8-a+crc works ... No." | tee -a configure.log if try $CC -c $CFLAGS -march=armv8-a+crc+simd $test.c; then echo "Check whether -march=armv8-a+crc+simd works ... Yes." | tee -a configure.log - acleflag="-march=armv8-a+crc+simd" + armv8flag="-march=armv8-a+crc+simd" else echo "Check whether -march=armv8-a+crc+simd works ... No." | tee -a configure.log fi @@ -1149,10 +1149,10 @@ int main(void) { return 0; } EOF if try ${CC} ${CFLAGS} ${acleflag} $test.c; then echo "Checking for ARMv8 CRC intrinsics ... Yes." | tee -a configure.log - ACLE_AVAILABLE=1 + ARMV8_AVAILABLE=1 else echo "Checking for ARMv8 CRC intrinsics ... No." | tee -a configure.log - ACLE_AVAILABLE=0 + ARMV8_AVAILABLE=0 fi } @@ -1737,15 +1737,15 @@ EOF fi fi - if test $buildacle -eq 1; then - check_acle_compiler_flag + if test $buildarmv8 -eq 1; then + check_armv8_compiler_flag - if test $ACLE_AVAILABLE -eq 1; then - CFLAGS="${CFLAGS} -DARM_ACLE" - SFLAGS="${SFLAGS} -DARM_ACLE" + if test $ARMV8_AVAILABLE -eq 1; then + CFLAGS="${CFLAGS} -DARM_CRC32" + SFLAGS="${SFLAGS} -DARM_CRC32" - ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} crc32_acle.o" - ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} crc32_acle.lo" + ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} crc32_armv8.o" + ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} crc32_armv8.lo" fi fi @@ -1949,7 +1949,7 @@ echo sse42flag = $sse42flag >> configure.log echo pclmulflag = $pclmulflag >> configure.log echo vpclmulflag = $vpclmulflag >> configure.log echo xsaveflag = $xsaveflag >> configure.log -echo acleflag = $acleflag >> configure.log +echo armv8flag = $armv8flag >> configure.log echo neonflag = $neonflag >> configure.log echo armv6flag = $armv6flag >> configure.log echo ARCHDIR = ${ARCHDIR} >> configure.log @@ -2090,7 +2090,7 @@ sed < $SRCDIR/$ARCHDIR/Makefile.in " /^PCLMULFLAG *=/s#=.*#=$pclmulflag# /^VPCLMULFLAG *=/s#=.*#=$vpclmulflag# /^XSAVEFLAG *=/s#=.*#=$xsaveflag# -/^ACLEFLAG *=/s#=.*#=$acleflag# +/^ARMV8FLAG *=/s#=.*#=$armv8flag# /^NEONFLAG *=/s#=.*#=$neonflag# /^ARMV6FLAG *=/s#=.*#=$armv6flag# /^NOLTOFLAG *=/s#=.*#=$noltoflag# diff --git a/functable.c b/functable.c index 3cee95bf..20ad4c0d 100644 --- a/functable.c +++ b/functable.c @@ -183,10 +183,10 @@ static void init_functable(void) { # endif } #endif - // ARM - ACLE -#ifdef ARM_ACLE + // ARM - CRC32 +#ifdef ARM_CRC32 if (cf.arm.has_crc32) { - ft.crc32 = &crc32_acle; + ft.crc32 = &crc32_armv8; } #endif diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index abb1055c..0150c703 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -191,7 +191,7 @@ if(WITH_GTEST) test_adler32.cc # adler32_neon(), etc test_compare256.cc # compare256_neon(), etc test_compare256_rle.cc # compare256_rle(), etc - test_crc32.cc # crc32_acle(), etc + test_crc32.cc # crc32_armv8(), etc test_inflate_sync.cc # expects a certain compressed block layout test_main.cc # cpu_check_features() test_version.cc # expects a fixed version string diff --git a/test/benchmarks/benchmark_crc32.cc b/test/benchmarks/benchmark_crc32.cc index 7aba7c33..eb4369c1 100644 --- a/test/benchmarks/benchmark_crc32.cc +++ b/test/benchmarks/benchmark_crc32.cc @@ -62,8 +62,8 @@ BENCHMARK_CRC32(braid, PREFIX(crc32_braid), 1); BENCHMARK_CRC32(native, native_crc32, 1); #else -#ifdef ARM_ACLE -BENCHMARK_CRC32(acle, crc32_acle, test_cpu_features.arm.has_crc32); +#ifdef ARM_CRC32 +BENCHMARK_CRC32(armv8, crc32_armv8, test_cpu_features.arm.has_crc32); #endif #ifdef POWER8_VSX_CRC32 BENCHMARK_CRC32(power8, crc32_power8, test_cpu_features.power.has_arch_2_07); diff --git a/test/test_crc32.cc b/test/test_crc32.cc index ea839383..5b727ce4 100644 --- a/test/test_crc32.cc +++ b/test/test_crc32.cc @@ -197,7 +197,7 @@ public: } }; -/* Specifically to test where we had dodgy alignment in the acle CRC32 +/* Specifically to test where we had dodgy alignment in the ARMv8 CRC32 * function. All others are either byte level access or use intrinsics * that work with unaligned access */ class crc32_align : public ::testing::TestWithParam { @@ -231,7 +231,7 @@ TEST_CRC32(native, native_crc32, 1) #else -#ifdef ARM_ACLE +#ifdef ARM_CRC32 static const int align_offsets[] = { 1, 2, 3, 4, 5, 6, 7 }; @@ -246,8 +246,8 @@ static const int align_offsets[] = { } INSTANTIATE_TEST_SUITE_P(crc32_alignment, crc32_align, testing::ValuesIn(align_offsets)); -TEST_CRC32(acle, crc32_acle, test_cpu_features.arm.has_crc32) -TEST_CRC32_ALIGN(acle_align, crc32_acle, test_cpu_features.arm.has_crc32) +TEST_CRC32(armv8, crc32_armv8, test_cpu_features.arm.has_crc32) +TEST_CRC32_ALIGN(armv8_align, crc32_armv8, test_cpu_features.arm.has_crc32) #endif #ifdef POWER8_VSX_CRC32 TEST_CRC32(power8, crc32_power8, test_cpu_features.power.has_arch_2_07) diff --git a/win32/Makefile.a64 b/win32/Makefile.a64 index 3209f6a3..d2d36fb6 100644 --- a/win32/Makefile.a64 +++ b/win32/Makefile.a64 @@ -94,12 +94,12 @@ OBJS = $(OBJS) gzlib.obj gzread.obj gzwrite.obj !endif WFLAGS = $(WFLAGS) \ - -DARM_ACLE \ + -DARM_CRC32 \ -D__ARM_NEON__=1 \ -DARM_NEON \ -DARM_NOCHECK_NEON \ # -OBJS = $(OBJS) crc32_acle.obj adler32_neon.obj chunkset_neon.obj compare256_neon.obj slide_hash_neon.obj +OBJS = $(OBJS) crc32_armv8.obj adler32_neon.obj chunkset_neon.obj compare256_neon.obj slide_hash_neon.obj # targets all: $(STATICLIB) $(SHAREDLIB) $(IMPLIB) \ diff --git a/win32/Makefile.arm b/win32/Makefile.arm index 54da045f..d0299279 100644 --- a/win32/Makefile.arm +++ b/win32/Makefile.arm @@ -40,7 +40,7 @@ RCFILE = zlib1.rc RESFILE = zlib1.res WITH_GZFILEOP = yes ZLIB_COMPAT = -WITH_ACLE = +WITH_ARMV8 = WITH_NEON = WITH_ARMV6 = WITH_VFPV3 = @@ -98,9 +98,9 @@ WFLAGS = $(WFLAGS) -DWITH_GZFILEOP OBJS = $(OBJS) gzlib.obj gzread.obj gzwrite.obj !endif -!if "$(WITH_ACLE)" != "" -WFLAGS = $(WFLAGS) -DARM_ACLE -OBJS = $(OBJS) crc32_acle.obj +!if "$(WITH_ARMV8)" != "" +WFLAGS = $(WFLAGS) -DARM_CRC32 +OBJS = $(OBJS) crc32_armv8.obj !endif !if "$(WITH_VFPV3)" != "" NEON_ARCH = /arch:VFPv3