From: Conor Dooley Date: Tue, 7 Apr 2026 15:36:23 +0000 (+0100) Subject: riscv: dts: microchip: add tsu clock to macb on pic64gx X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=725351152a7d0c9cdd7072724d1e4d3e7c452f9a;p=thirdparty%2Fkernel%2Flinux.git riscv: dts: microchip: add tsu clock to macb on pic64gx In increment mode, the tsu clock for the macb is provided separately to the pck, usually the same clock as the reference to the rtc provided by an off-chip oscillator. pclk is 150 MHz typically, and the reference is either 100 MHz or 125 MHz, so having the tsu clock is required for correct rate selection. Signed-off-by: Conor Dooley --- diff --git a/arch/riscv/boot/dts/microchip/pic64gx.dtsi b/arch/riscv/boot/dts/microchip/pic64gx.dtsi index c164d7bc270a2..e9ec376b1776b 100644 --- a/arch/riscv/boot/dts/microchip/pic64gx.dtsi +++ b/arch/riscv/boot/dts/microchip/pic64gx.dtsi @@ -459,8 +459,8 @@ interrupts = <64>, <65>, <66>, <67>, <68>, <69>; /* Filled in by a bootloader */ local-mac-address = [00 00 00 00 00 00]; - clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>; - clock-names = "pclk", "hclk"; + clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>; + clock-names = "pclk", "hclk", "tsu_clk"; resets = <&mss_top_sysreg CLK_MAC0>; status = "disabled"; }; @@ -475,8 +475,8 @@ interrupts = <70>, <71>, <72>, <73>, <74>, <75>; /* Filled in by a bootloader */ local-mac-address = [00 00 00 00 00 00]; - clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>; - clock-names = "pclk", "hclk"; + clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>; + clock-names = "pclk", "hclk", "tsu_clk"; resets = <&mss_top_sysreg CLK_MAC1>; status = "disabled"; };