From: Jiri Denemark <jdenemar@redhat.com>
Date: Tue, 23 Jun 2015 13:08:40 +0000 (+0200)
Subject: cpu_map.xml: Expand SandyBridge CPU model
X-Git-Tag: v1.2.18-rc1~158
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=732d3d147adecb867f62c67ab3743c0aefd87e50;p=thirdparty%2Flibvirt.git

cpu_map.xml: Expand SandyBridge CPU model

Inheritance among CPU model is cool but it makes reviewing CPU model
definitions and comparing them to CPU models from QEMU rather hard and
unpleasant. Let's define all CPU models from scratch.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
---

diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 71235bc8a3..7e9dedf4a6 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -855,17 +855,55 @@
     </model>
 
     <model name='Haswell-noTSX'>
-      <model name='SandyBridge'/>
+      <vendor name='Intel'/>
+      <feature name='aes'/>
+      <feature name='apic'/>
+      <feature name='avx'/>
       <feature name='avx2'/>
       <feature name='bmi1'/>
       <feature name='bmi2'/>
+      <feature name='clflush'/>
+      <feature name='cmov'/>
+      <feature name='cx16'/>
+      <feature name='cx8'/>
+      <feature name='de'/>
       <feature name='erms'/>
       <feature name='fma'/>
+      <feature name='fpu'/>
       <feature name='fsgsbase'/>
+      <feature name='fxsr'/>
       <feature name='invpcid'/>
+      <feature name='lahf_lm'/>
+      <feature name='lm'/>
+      <feature name='mca'/>
+      <feature name='mce'/>
+      <feature name='mmx'/>
       <feature name='movbe'/>
+      <feature name='msr'/>
+      <feature name='mtrr'/>
+      <feature name='nx'/>
+      <feature name='pae'/>
+      <feature name='pat'/>
       <feature name='pcid'/>
+      <feature name='pclmuldq'/>
+      <feature name='pge'/>
+      <feature name='pni'/>
+      <feature name='popcnt'/>
+      <feature name='pse'/>
+      <feature name='pse36'/>
+      <feature name='rdtscp'/>
+      <feature name='sep'/>
       <feature name='smep'/>
+      <feature name='sse'/>
+      <feature name='sse2'/>
+      <feature name='sse4.1'/>
+      <feature name='sse4.2'/>
+      <feature name='ssse3'/>
+      <feature name='syscall'/>
+      <feature name='tsc'/>
+      <feature name='tsc-deadline'/>
+      <feature name='x2apic'/>
+      <feature name='xsave'/>
     </model>
 
     <model name='Haswell'>