From: Florian Weimer Date: Thu, 10 Apr 2025 04:52:18 +0000 (+0200) Subject: powerpc: Remove relocation cache flush code for power64 X-Git-Tag: glibc-2.42~319 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=77e8b40a6ef4dc70c373523f7ac46e726089906f;p=thirdparty%2Fglibc.git powerpc: Remove relocation cache flush code for power64 This is only needed for -mno-secure-plt, and this linkage mode is not supported with powerpc64 and powerp64le. Reviewed-by: Peter Bergner --- diff --git a/sysdeps/powerpc/powerpc64/dl-machine.h b/sysdeps/powerpc/powerpc64/dl-machine.h index d8d7c8b763..89e26bbd2e 100644 --- a/sysdeps/powerpc/powerpc64/dl-machine.h +++ b/sysdeps/powerpc/powerpc64/dl-machine.h @@ -363,7 +363,6 @@ elf_machine_runtime_setup (struct link_map *map, struct r_scope_elem *scope[], / sizeof (Elf64_Rela)); Elf64_Addr l_addr = map->l_addr; Elf64_Dyn **info = map->l_info; - char *p; extern void _dl_runtime_resolve (void); extern void _dl_profile_resolve (void); @@ -435,20 +434,6 @@ elf_machine_runtime_setup (struct link_map *map, struct r_scope_elem *scope[], offset += PLT_ENTRY_WORDS; glink_offset += GLINK_ENTRY_WORDS (i); } - - /* Now, we've modified data. We need to write the changes from - the data cache to a second-level unified cache, then make - sure that stale data in the instruction cache is removed. - (In a multiprocessor system, the effect is more complex.) - Most of the PLT shouldn't be in the instruction cache, but - there may be a little overlap at the start and the end. - - Assumes that dcbst and icbi apply to lines of 16 bytes or - more. Current known line sizes are 16, 32, and 128 bytes. */ - - for (p = (char *) plt; p < (char *) &plt[offset]; p += 16) - PPC_DCBST (p); - PPC_SYNC; } } return lazy;