From: Jakub Jelinek <jakub@redhat.com>
Date: Mon, 22 Feb 2016 21:27:08 +0000 (+0100)
Subject: re PR bootstrap/69885 (ICE in maybe_legitimize_operand, at optabs.c:6903 on m68k... 
X-Git-Tag: basepoints/gcc-7~822
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=78250306ccc6a32aa473beab781457e2161db607;p=thirdparty%2Fgcc.git

re PR bootstrap/69885 (ICE in maybe_legitimize_operand, at optabs.c:6903 on m68k-linux-gnu)

	PR target/69885
	* doc/md.texi (ashl@var{m}3): Document that mode of operand 2 must
	be specified.

From-SVN: r233613
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a8a5613ac1f3..fea679871027 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 2016-02-22  Jakub Jelinek  <jakub@redhat.com>
 
+	PR target/69885
+	* doc/md.texi (ashl@var{m}3): Document that mode of operand 2 must
+	be specified.
+
 	PR target/69894
 	PR target/69895
 	* config/m68k/t-opts (OPTIONS_H_EXTRA): Add m68k-microarchs.def
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index f9ecfceedb02..4c83719588a9 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -5283,7 +5283,9 @@ Arithmetic-shift operand 1 left by a number of bits specified by operand
 2, and store the result in operand 0.  Here @var{m} is the mode of
 operand 0 and operand 1; operand 2's mode is specified by the
 instruction pattern, and the compiler will convert the operand to that
-mode before generating the instruction.  The meaning of out-of-range shift
+mode before generating the instruction.  The shift or rotate expander
+or instruction pattern should explicitly specify the mode of the operand 2,
+it should never be @code{VOIDmode}.  The meaning of out-of-range shift
 counts can optionally be specified by @code{TARGET_SHIFT_TRUNCATION_MASK}.
 @xref{TARGET_SHIFT_TRUNCATION_MASK}.  Operand 2 is always a scalar type.