From: Alan Modra Date: Thu, 26 Mar 2015 08:33:53 +0000 (+1030) Subject: re PR regression/63150 (FAIL: gcc.target/powerpc/pr53199.c scan-assembler-times *) X-Git-Tag: releases/gcc-4.9.3~245 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=79613a00e36c4d6b8c1760e71070b0308b11675d;p=thirdparty%2Fgcc.git re PR regression/63150 (FAIL: gcc.target/powerpc/pr53199.c scan-assembler-times *) PR target/63150 Backport from trunk 211857 and 221445. 2014-06-20 Maciej W. Rozycki * config/rs6000/rs6000.md: Append `DONE' to preparation statements of `bswap' pattern splitters. 2015-03-16 Alan Modra * config/rs6000/rs6000.md (bswapdi2): Remove one scratch reg. Modify Z->r bswapdi splitter to use dest in place of scratch. In r->Z and Z->r bswapdi splitter rename word_high, word_low to word1, word2 and rearrange logic to suit. (bswapdi2_64bit): Remove early clobber on Z->r alternative. (bswapdi2_ldbrx): Likewise. Remove '??' on r->r. (bswapdi2_32bit): Remove early clobber on Z->r alternative. Add one '?' on r->r. Modify Z->r splitter to avoid need for early clobber. From-SVN: r221689 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6ef89bbe2cf3..292b33d543f4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,22 @@ +2015-03-26 Alan Modra + + PR target/63150 + Backport from trunk 211857 and 221445. + 2014-06-20 Maciej W. Rozycki + * config/rs6000/rs6000.md: Append `DONE' to preparation + statements of `bswap' pattern splitters. + + 2015-03-16 Alan Modra + * config/rs6000/rs6000.md (bswapdi2): Remove one scratch reg. + Modify Z->r bswapdi splitter to use dest in place of scratch. + In r->Z and Z->r bswapdi splitter rename word_high, word_low + to word1, word2 and rearrange logic to suit. + (bswapdi2_64bit): Remove early clobber on Z->r alternative. + (bswapdi2_ldbrx): Likewise. Remove '??' on r->r. + (bswapdi2_32bit): Remove early clobber on Z->r alternative. + Add one '?' on r->r. Modify Z->r splitter to avoid need for + early clobber. + 2015-03-26 Oleg Endo Backport from mainline diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f77754aa1103..94637f72187e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2389,8 +2389,7 @@ (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" ""))) (clobber (match_scratch:DI 2 "")) - (clobber (match_scratch:DI 3 "")) - (clobber (match_scratch:DI 4 ""))])] + (clobber (match_scratch:DI 3 ""))])] "" { if (!REG_P (operands[0]) && !REG_P (operands[1])) @@ -2408,11 +2407,10 @@ ;; Power7/cell has ldbrx/stdbrx, so use it directly (define_insn "*bswapdi2_ldbrx" - [(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,??&r") + [(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,&r") (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r"))) (clobber (match_scratch:DI 2 "=X,X,&r")) - (clobber (match_scratch:DI 3 "=X,X,&r")) - (clobber (match_scratch:DI 4 "=X,X,&r"))] + (clobber (match_scratch:DI 3 "=X,X,&r"))] "TARGET_POWERPC64 && TARGET_LDBRX && (REG_P (operands[0]) || REG_P (operands[1]))" "@ @@ -2424,11 +2422,10 @@ ;; Non-power7/cell, fall back to use lwbrx/stwbrx (define_insn "*bswapdi2_64bit" - [(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,&r") + [(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,&r") (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r"))) (clobber (match_scratch:DI 2 "=&b,&b,&r")) - (clobber (match_scratch:DI 3 "=&r,&r,&r")) - (clobber (match_scratch:DI 4 "=&r,X,&r"))] + (clobber (match_scratch:DI 3 "=&r,&r,&r"))] "TARGET_POWERPC64 && !TARGET_LDBRX && (REG_P (operands[0]) || REG_P (operands[1])) && !(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0])) @@ -2440,8 +2437,7 @@ [(set (match_operand:DI 0 "gpc_reg_operand" "") (bswap:DI (match_operand:DI 1 "indexed_or_indirect_operand" ""))) (clobber (match_operand:DI 2 "gpc_reg_operand" "")) - (clobber (match_operand:DI 3 "gpc_reg_operand" "")) - (clobber (match_operand:DI 4 "gpc_reg_operand" ""))] + (clobber (match_operand:DI 3 "gpc_reg_operand" ""))] "TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed" [(const_int 0)] " @@ -2450,15 +2446,14 @@ rtx src = operands[1]; rtx op2 = operands[2]; rtx op3 = operands[3]; - rtx op4 = operands[4]; rtx op3_32 = simplify_gen_subreg (SImode, op3, DImode, BYTES_BIG_ENDIAN ? 4 : 0); - rtx op4_32 = simplify_gen_subreg (SImode, op4, DImode, - BYTES_BIG_ENDIAN ? 4 : 0); + rtx dest_32 = simplify_gen_subreg (SImode, dest, DImode, + BYTES_BIG_ENDIAN ? 4 : 0); rtx addr1; rtx addr2; - rtx word_high; - rtx word_low; + rtx word1; + rtx word2; addr1 = XEXP (src, 0); if (GET_CODE (addr1) == PLUS) @@ -2483,29 +2478,30 @@ addr2 = gen_rtx_PLUS (Pmode, op2, addr1); } + word1 = change_address (src, SImode, addr1); + word2 = change_address (src, SImode, addr2); + if (BYTES_BIG_ENDIAN) { - word_high = change_address (src, SImode, addr1); - word_low = change_address (src, SImode, addr2); + emit_insn (gen_bswapsi2 (op3_32, word2)); + emit_insn (gen_bswapsi2 (dest_32, word1)); } else { - word_high = change_address (src, SImode, addr2); - word_low = change_address (src, SImode, addr1); + emit_insn (gen_bswapsi2 (op3_32, word1)); + emit_insn (gen_bswapsi2 (dest_32, word2)); } - emit_insn (gen_bswapsi2 (op3_32, word_low)); - emit_insn (gen_bswapsi2 (op4_32, word_high)); - emit_insn (gen_ashldi3 (dest, op3, GEN_INT (32))); - emit_insn (gen_iordi3 (dest, dest, op4)); + emit_insn (gen_ashldi3 (op3, op3, GEN_INT (32))); + emit_insn (gen_iordi3 (dest, dest, op3)); + DONE; }") (define_split [(set (match_operand:DI 0 "indexed_or_indirect_operand" "") (bswap:DI (match_operand:DI 1 "gpc_reg_operand" ""))) (clobber (match_operand:DI 2 "gpc_reg_operand" "")) - (clobber (match_operand:DI 3 "gpc_reg_operand" "")) - (clobber (match_operand:DI 4 "" ""))] + (clobber (match_operand:DI 3 "gpc_reg_operand" ""))] "TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed" [(const_int 0)] " @@ -2520,8 +2516,8 @@ BYTES_BIG_ENDIAN ? 4 : 0); rtx addr1; rtx addr2; - rtx word_high; - rtx word_low; + rtx word1; + rtx word2; addr1 = XEXP (dest, 0); if (GET_CODE (addr1) == PLUS) @@ -2546,27 +2542,29 @@ addr2 = gen_rtx_PLUS (Pmode, op2, addr1); } + word1 = change_address (dest, SImode, addr1); + word2 = change_address (dest, SImode, addr2); + emit_insn (gen_lshrdi3 (op3, src, GEN_INT (32))); + if (BYTES_BIG_ENDIAN) { - word_high = change_address (dest, SImode, addr1); - word_low = change_address (dest, SImode, addr2); + emit_insn (gen_bswapsi2 (word1, src_si)); + emit_insn (gen_bswapsi2 (word2, op3_si)); } else { - word_high = change_address (dest, SImode, addr2); - word_low = change_address (dest, SImode, addr1); + emit_insn (gen_bswapsi2 (word2, src_si)); + emit_insn (gen_bswapsi2 (word1, op3_si)); } - emit_insn (gen_bswapsi2 (word_high, src_si)); - emit_insn (gen_bswapsi2 (word_low, op3_si)); + DONE; }") (define_split [(set (match_operand:DI 0 "gpc_reg_operand" "") (bswap:DI (match_operand:DI 1 "gpc_reg_operand" ""))) (clobber (match_operand:DI 2 "gpc_reg_operand" "")) - (clobber (match_operand:DI 3 "gpc_reg_operand" "")) - (clobber (match_operand:DI 4 "" ""))] + (clobber (match_operand:DI 3 "gpc_reg_operand" ""))] "TARGET_POWERPC64 && reload_completed" [(const_int 0)] " @@ -2586,10 +2584,11 @@ emit_insn (gen_bswapsi2 (op3_si, op2_si)); emit_insn (gen_ashldi3 (dest, dest, GEN_INT (32))); emit_insn (gen_iordi3 (dest, dest, op3)); + DONE; }") (define_insn "bswapdi2_32bit" - [(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,&r") + [(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,?&r") (bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r"))) (clobber (match_scratch:SI 2 "=&b,&b,X"))] "!TARGET_POWERPC64 && (REG_P (operands[0]) || REG_P (operands[1]))" @@ -2618,7 +2617,8 @@ if (GET_CODE (addr1) == PLUS) { emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); - if (TARGET_AVOID_XFORM) + if (TARGET_AVOID_XFORM + || REGNO (XEXP (addr1, 1)) == REGNO (dest2)) { emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); addr2 = op2; @@ -2626,7 +2626,8 @@ else addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); } - else if (TARGET_AVOID_XFORM) + else if (TARGET_AVOID_XFORM + || REGNO (addr1) == REGNO (dest2)) { emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); addr2 = op2; @@ -2641,7 +2642,10 @@ word2 = change_address (src, SImode, addr2); emit_insn (gen_bswapsi2 (dest2, word1)); + /* The REGNO (dest2) tests above ensure that addr2 has not been trashed, + thus allowing us to omit an early clobber on the output. */ emit_insn (gen_bswapsi2 (dest1, word2)); + DONE; }") (define_split @@ -2690,6 +2694,7 @@ emit_insn (gen_bswapsi2 (word2, src1)); emit_insn (gen_bswapsi2 (word1, src2)); + DONE; }") (define_split @@ -2709,6 +2714,7 @@ emit_insn (gen_bswapsi2 (dest1, src2)); emit_insn (gen_bswapsi2 (dest2, src1)); + DONE; }") (define_insn "mulsi3" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5ae1bf25077c..9766a5205021 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-03-26 Alan Modra + + * gcc.target/powerpc/pr53199.c: Add extra functions. Revert + 2014-12-05 change. + 2015-03-24 Maxim Kuvyrkov Backport from mainline: diff --git a/gcc/testsuite/gcc.target/powerpc/pr53199.c b/gcc/testsuite/gcc.target/powerpc/pr53199.c index 89a0cad06fea..7635cb00ea97 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr53199.c +++ b/gcc/testsuite/gcc.target/powerpc/pr53199.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ /* { dg-options "-O2 -mcpu=power6 -mavoid-indexed-addresses" } */ -/* { dg-final { scan-assembler-times "lwbrx" 6 } } */ +/* { dg-final { scan-assembler-times "lwbrx" 12 } } */ /* { dg-final { scan-assembler-times "stwbrx" 6 } } */ /* PR 51399: bswap gets an error if -mavoid-indexed-addresses was used in @@ -25,6 +25,24 @@ load64_reverse_3 (long long *p, int i) return __builtin_bswap64 (p[i]); } +long long +load64_reverse_4 (long long dummy __attribute__ ((unused)), long long *p) +{ + return __builtin_bswap64 (*p); +} + +long long +load64_reverse_5 (long long dummy __attribute__ ((unused)), long long *p) +{ + return __builtin_bswap64 (p[1]); +} + +long long +load64_reverse_6 (long long dummy __attribute__ ((unused)), long long *p, int i) +{ + return __builtin_bswap64 (p[i]); +} + void store64_reverse_1 (long long *p, long long x) { @@ -44,7 +62,13 @@ store64_reverse_3 (long long *p, long long x, int i) } long long -reg_reverse (long long x) +reg_reverse_1 (long long x) +{ + return __builtin_bswap64 (x); +} + +long long +reg_reverse_2 (long long dummy __attribute__ ((unused)), long long x) { return __builtin_bswap64 (x); }