From: Colin Huang Date: Mon, 11 May 2026 09:47:56 +0000 (+0800) Subject: ARM: dts: aspeed: anacapa: Add JTAG CPLD TRST pin to SGPIO map X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=79fb6e46a92003b9aed5391218e1e27b12147b94;p=thirdparty%2Fkernel%2Flinux.git ARM: dts: aspeed: anacapa: Add JTAG CPLD TRST pin to SGPIO map Add JTAG_CPLD_TRST_R_N to the sgpiom0 pin name table on Facebook Anacapa BMC. This exposes the CPLD JTAG TRST signal through SGPIO, allowing proper JTAG reset control during debug. [arj: Minor tidying of commit message formatting] Signed-off-by: Colin Huang Link: https://patch.msgid.link/20260511-add-jtag-trst-pin-v1-1-b0be2f7b2da5@gmail.com Signed-off-by: Andrew Jeffery --- diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts index 2cb7bd128d24e..9a43e0c87257c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts @@ -882,7 +882,7 @@ /* C0-C7 line 32-47 */ "RSVD_RMC_GPIO3", "", "", "", "", "", "", "", - "LEAK_DETECT_RMC_N", "", "", "", + "LEAK_DETECT_RMC_N", "JTAG_CPLD_TRST_R_N", "", "", "", "", "", "", /* D0-D7 line 48-63 */