From: Chen-Yu Tsai Date: Mon, 2 Mar 2026 15:35:58 +0000 (+0800) Subject: arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7be3644795573055d2d3ae707e2c418c985d3a38;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND The Avaota A1 board has a SPI NAND chip connected to spi0 on the PJ pins with support for QSPI. Enable spi0 and add a device node for the SPI NAND chip. Acked-by: Jernej Skrabec Link: https://patch.msgid.link/20260302153559.3199783-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai --- diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index 7c24121de88f..474354fbfcec 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -403,6 +403,21 @@ assigned-clock-rates = <32768>; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pj_pins>, <&spi0_cs0_pj_pin>, + <&spi0_hold_pj_pin>, <&spi0_wp_pj_pin>; + status = "okay"; + + nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <100000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;