From: Ryan Chen Date: Fri, 6 Mar 2026 19:44:32 +0000 (-0600) Subject: airoha: an7581: w1700k: fix RTL8261N PHY boot failure with increased reset timing X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7be78e718e239d7d136eb136d7cc4eb6f7ce9671;p=thirdparty%2Fopenwrt.git airoha: an7581: w1700k: fix RTL8261N PHY boot failure with increased reset timing Some W1700K and XR1701G boards with Realtek RTL8261N/RTL8261BE 10G PHYs fail to bring up the USXGMII link on cold boot. The PHY enters a bad state during initialization and the link stays down permanently until power cycle. Root cause: the GPIO reset assert/deassert timing (40ms/150ms) is too short for the RTL8261N to complete its internal firmware load. The OEM firmware uses 200ms/200ms. Increase both PHY reset timings to 200ms/200ms to match OEM values. Confirmed to fix intermittent boot failures on both W1700K (Gemtek) and XR1701G boards. Signed-off-by: Ryan Chen Link: https://github.com/openwrt/openwrt/pull/22564 Signed-off-by: Hauke Mehrtens --- diff --git a/target/linux/airoha/dts/an7581-w1700k-ubi.dts b/target/linux/airoha/dts/an7581-w1700k-ubi.dts index a44610e345f..3286c3810be 100644 --- a/target/linux/airoha/dts/an7581-w1700k-ubi.dts +++ b/target/linux/airoha/dts/an7581-w1700k-ubi.dts @@ -351,8 +351,8 @@ compatible = "ethernet-phy-ieee802.3-c45"; reg = <5>; reset-gpios = <&en7581_pinctrl 46 GPIO_ACTIVE_LOW>; - reset-assert-us = <40000>; - reset-deassert-us = <150000>; + reset-assert-us = <200000>; + reset-deassert-us = <200000>; interrupt-parent = <&en7581_pinctrl>; interrupts = <22 IRQ_TYPE_LEVEL_LOW>; realtek,pnswap-tx; @@ -363,8 +363,8 @@ compatible = "ethernet-phy-ieee802.3-c45"; reg = <8>; reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>; - reset-assert-us = <40000>; - reset-deassert-us = <150000>; + reset-assert-us = <200000>; + reset-deassert-us = <200000>; interrupt-parent = <&en7581_pinctrl>; interrupts = <23 IRQ_TYPE_LEVEL_LOW>; realtek,pnswap-tx;