From: Tom Rini <trini@konsulko.com>
Date: Thu, 24 Jul 2025 13:55:13 +0000 (-0600)
Subject: Merge tag 'xilinx-for-v2025.10-rc1-v2' of https://source.denx.de/u-boot/custodians... 
X-Git-Tag: v2025.10-rc1~19
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7bf2a52b4943b5a83785d8fbd66275cb8e93c49d;p=thirdparty%2Fu-boot.git

Merge tag 'xilinx-for-v2025.10-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx/FPGA changes for v2025.10-rc1 v2

zynqmp:
- Generate fit-dtb.blob all the time
- Simplify power-domain driver bind

zynqmp_mini:
- Remove PSCI_RESET

fpga:
- Improve user feedback in case of FPGA bitstream load failure

misc:
- Fix kernel-doc in gpio zynq and axi_mrmac

spi:
- Revert fix in STIG mode

[trini: Remove CONFIG_FPGA_VERSALPL=y from sandbox due to
        sandbox+clang+asan test problem]
Signed-off-by: Tom Rini <trini@konsulko.com>
---

7bf2a52b4943b5a83785d8fbd66275cb8e93c49d
diff --cc configs/sandbox_defconfig
index 2eba02e1f07,f2af4e54cef..da499746492
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@@ -197,6 -202,21 +202,20 @@@ CONFIG_SANDBOX_DMA=
  CONFIG_FASTBOOT_FLASH=y
  CONFIG_FASTBOOT_FLASH_MMC_DEV=0
  CONFIG_ARM_FFA_TRANSPORT=y
+ CONFIG_FPGA_ALTERA=y
+ CONFIG_FPGA_STRATIX_II=y
+ CONFIG_FPGA_STRATIX_V=y
+ CONFIG_FPGA_ACEX1K=y
+ CONFIG_FPGA_CYCLON2=y
+ CONFIG_FPGA_LATTICE=y
+ CONFIG_FPGA_XILINX=y
 -CONFIG_FPGA_VERSALPL=y
+ CONFIG_FPGA_SPARTAN2=y
+ CONFIG_FPGA_SPARTAN3=y
+ CONFIG_FPGA_VIRTEX2=y
+ CONFIG_SYS_FPGA_CHECK_BUSY=y
+ CONFIG_SYS_FPGA_CHECK_CTRLC=y
+ CONFIG_DM_FPGA=y
+ CONFIG_SANDBOX_FPGA=y
  CONFIG_GPIO_HOG=y
  CONFIG_DM_GPIO_LOOKUP_LABEL=y
  CONFIG_QCOM_PMIC_GPIO=y