From: Richard Earnshaw Date: Thu, 15 Jan 2015 18:47:31 +0000 (+0000) Subject: arm.c (arm_xgene_tune): Add default initializer for instruction fusion. X-Git-Tag: releases/gcc-5.1.0~1728 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7c21d0ff8161eef557cbd54d16ded22d8cd51fbd;p=thirdparty%2Fgcc.git arm.c (arm_xgene_tune): Add default initializer for instruction fusion. * arm.c (arm_xgene_tune): Add default initializer for instruction fusion. From-SVN: r219679 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 564074f0c39c..b9f2e3d25fc3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-01-15 Richard Earnshaw + + * arm.c (arm_xgene_tune): Add default initializer for instruction + fusion. + 2015-01-15 Jan Hubicka PR ipa/64068 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index a2cce8e36920..c10684369079 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1928,7 +1928,8 @@ const struct tune_params arm_xgene1_tune = false, /* Prefer Neon for 64-bits bitops. */ true, true, /* Prefer 32-bit encodings. */ false, /* Prefer Neon for stringops. */ - 32 /* Maximum insns to inline memset. */ + 32, /* Maximum insns to inline memset. */ + ARM_FUSE_NOTHING /* Fuseable pairs of instructions. */ }; /* Branches can be dual-issued on Cortex-A5, so conditional execution is