From: Krzysztof Kozlowski Date: Tue, 8 Apr 2025 09:32:01 +0000 (+0200) Subject: arm64: dts: qcom: msm8917: Use the header with DSI phy clock IDs X-Git-Tag: v6.16-rc1~97^2~20^2~113 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7c92da246e1a6933f25fa015d6c43a6bcfb2c7b3;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: qcom: msm8917: Use the header with DSI phy clock IDs Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-4-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi b/arch/arm64/boot/dts/qcom/msm8917.dtsi index 9d8358745c91c..8a642fce2e40d 100644 --- a/arch/arm64/boot/dts/qcom/msm8917.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8917.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only +#include #include #include #include @@ -961,8 +962,8 @@ #power-domain-cells = <1>; clocks = <&xo_board>, <&sleep_clk>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi0_phy 0>; + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, + <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>; clock-names = "xo", "sleep_clk", "dsi0pll", @@ -1051,8 +1052,8 @@ assigned-clocks = <&gcc BYTE0_CLK_SRC>, <&gcc PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>; + assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; clocks = <&gcc GCC_MDSS_MDP_CLK>, <&gcc GCC_MDSS_AHB_CLK>,