From: liuhongt Date: Tue, 11 Nov 2025 08:19:19 +0000 (-0800) Subject: Optimize kmov + kmov + or to kortest. X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7d297806214d84daba029568463e1e95224b797f;p=thirdparty%2Fgcc.git Optimize kmov + kmov + or to kortest. For instruction sequence like kmovb %k0, %edx kmovb %k1, %ecx orb %cl, %dl je .L5 if only CCZ is cared, it can be optimized to kortestb %k1, %k0 je .L5 gcc/ChangeLog: * config/i386/i386.md (*ior_ccz_1): New define_insn. gcc/testsuite/ChangeLog: * gcc.target/i386/kortest_ccz-1.c: New test. --- diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 3ea2439526b..f3c8f595de9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -14203,6 +14203,22 @@ (set_attr "isa" "*,apx_ndd") (set_attr "mode" "SI")]) +;; It must be put before *_3, the blow one. +(define_insn "*ior_ccz_1" + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (ior:SWI1248_AVX512BWDQ_64 + (match_operand:SWI1248_AVX512BWDQ_64 1 "nonimmediate_operand" "%0,?k") + (match_operand:SWI1248_AVX512BWDQ_64 2 "" ", k")) + (const_int 0))) + (clobber (match_scratch:SWI1248_AVX512BWDQ_64 0 "=, X"))] + "TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))" + "@ + or{}\t{%2, %0|%0, %2} + kortest\t{%1, %2|%2, %1}" + [(set_attr "type" "alu,msklog") + (set_attr "mode" "")]) + (define_insn "*_3" [(set (reg FLAGS_REG) (compare (any_or:SWI diff --git a/gcc/testsuite/gcc.target/i386/kortest_ccz-1.c b/gcc/testsuite/gcc.target/i386/kortest_ccz-1.c new file mode 100644 index 00000000000..b3cf5b803fb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/kortest_ccz-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-march=x86-64-v4 -O3" } */ +/* { dg-final { scan-assembler-not "kmov" } } */ +/* { dg-final { scan-assembler "kortest" } } */ + +int +foo (int *__restrict a, int* __restrict d, int b, int c, int n) +{ + for (int i = 0; i != 10000; i++) + if (a[i] > b | d[i] > c) + return 1; + return 0; +}