From: Pierrick Bouvier Date: Fri, 9 Jan 2026 05:31:31 +0000 (-0800) Subject: target/arm/gdbstub: extract aarch64_cpu_register_gdb_regs_for_features X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7e274980f2ed843f6393072533bdc7ff78fdb0a1;p=thirdparty%2Fqemu.git target/arm/gdbstub: extract aarch64_cpu_register_gdb_regs_for_features Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20260109053158.2800705-3-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 8865f27089..4e8e341cc0 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -537,58 +537,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) * registers so we don't need to include both. */ #ifdef TARGET_AARCH64 - if (isar_feature_aa64_sve(&cpu->isar) || - isar_feature_aa64_sme(&cpu->isar)) { - GDBFeature *feature = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs); - gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg, - aarch64_gdb_set_sve_reg, feature, 0); - } else { - gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg, - aarch64_gdb_set_fpu_reg, - gdb_find_static_feature("aarch64-fpu.xml"), - 0); - } - - if (isar_feature_aa64_sme(&cpu->isar)) { - GDBFeature *sme_feature = - arm_gen_dynamic_smereg_feature(cs, cs->gdb_num_regs); - gdb_register_coprocessor(cs, aarch64_gdb_get_sme_reg, - aarch64_gdb_set_sme_reg, sme_feature, 0); - if (isar_feature_aa64_sme2(&cpu->isar)) { - gdb_register_coprocessor(cs, aarch64_gdb_get_sme2_reg, - aarch64_gdb_set_sme2_reg, - gdb_find_static_feature("aarch64-sme2.xml"), - 0); - } - } - /* - * Note that we report pauth information via the feature name - * org.gnu.gdb.aarch64.pauth_v2, not org.gnu.gdb.aarch64.pauth. - * GDB versions 9 through 12 have a bug where they will crash - * if they see the latter XML from QEMU. - */ - if (isar_feature_aa64_pauth(&cpu->isar)) { - gdb_register_coprocessor(cs, aarch64_gdb_get_pauth_reg, - aarch64_gdb_set_pauth_reg, - gdb_find_static_feature("aarch64-pauth.xml"), - 0); - } - -#ifdef CONFIG_USER_ONLY - /* Memory Tagging Extension (MTE) 'tag_ctl' pseudo-register. */ - if (cpu_isar_feature(aa64_mte, cpu)) { - gdb_register_coprocessor(cs, aarch64_gdb_get_tag_ctl_reg, - aarch64_gdb_set_tag_ctl_reg, - gdb_find_static_feature("aarch64-mte.xml"), - 0); - } -#endif - - /* All AArch64 CPUs have at least TPIDR */ - gdb_register_coprocessor(cs, aarch64_gdb_get_tls_reg, - aarch64_gdb_set_tls_reg, - arm_gen_dynamic_tls_feature(cs, cs->gdb_num_regs), - 0); + aarch64_cpu_register_gdb_regs_for_features(cpu); #endif } else { if (arm_feature(env, ARM_FEATURE_NEON)) { diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 3bc7ff45d5..c584e5b4e6 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -879,3 +879,60 @@ void aarch64_cpu_register_gdb_commands(ARMCPU *cpu, GString *qsupported, } #endif } + +void aarch64_cpu_register_gdb_regs_for_features(ARMCPU *cpu) +{ + CPUState *cs = CPU(cpu); + if (isar_feature_aa64_sve(&cpu->isar) || + isar_feature_aa64_sme(&cpu->isar)) { + GDBFeature *feature = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs); + gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg, + aarch64_gdb_set_sve_reg, feature, 0); + } else { + gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg, + aarch64_gdb_set_fpu_reg, + gdb_find_static_feature("aarch64-fpu.xml"), + 0); + } + + if (isar_feature_aa64_sme(&cpu->isar)) { + GDBFeature *sme_feature = + arm_gen_dynamic_smereg_feature(cs, cs->gdb_num_regs); + gdb_register_coprocessor(cs, aarch64_gdb_get_sme_reg, + aarch64_gdb_set_sme_reg, sme_feature, 0); + if (isar_feature_aa64_sme2(&cpu->isar)) { + gdb_register_coprocessor(cs, aarch64_gdb_get_sme2_reg, + aarch64_gdb_set_sme2_reg, + gdb_find_static_feature("aarch64-sme2.xml"), + 0); + } + } + /* + * Note that we report pauth information via the feature name + * org.gnu.gdb.aarch64.pauth_v2, not org.gnu.gdb.aarch64.pauth. + * GDB versions 9 through 12 have a bug where they will crash + * if they see the latter XML from QEMU. + */ + if (isar_feature_aa64_pauth(&cpu->isar)) { + gdb_register_coprocessor(cs, aarch64_gdb_get_pauth_reg, + aarch64_gdb_set_pauth_reg, + gdb_find_static_feature("aarch64-pauth.xml"), + 0); + } + +#ifdef CONFIG_USER_ONLY + /* Memory Tagging Extension (MTE) 'tag_ctl' pseudo-register. */ + if (cpu_isar_feature(aa64_mte, cpu)) { + gdb_register_coprocessor(cs, aarch64_gdb_get_tag_ctl_reg, + aarch64_gdb_set_tag_ctl_reg, + gdb_find_static_feature("aarch64-mte.xml"), + 0); + } +#endif + + /* All AArch64 CPUs have at least TPIDR */ + gdb_register_coprocessor(cs, aarch64_gdb_get_tls_reg, + aarch64_gdb_set_tls_reg, + arm_gen_dynamic_tls_feature(cs, cs->gdb_num_regs), + 0); +} diff --git a/target/arm/internals.h b/target/arm/internals.h index 9cd4bf74ef..440072d820 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -387,6 +387,7 @@ void arm_translate_code(CPUState *cs, TranslationBlock *tb, void arm_cpu_register_gdb_commands(ARMCPU *cpu); void aarch64_cpu_register_gdb_commands(ARMCPU *cpu, GString *, GPtrArray *, GPtrArray *); +void aarch64_cpu_register_gdb_regs_for_features(ARMCPU *cpu); void arm_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb,