From: Sergio Paracuellos Date: Wed, 26 Jun 2019 12:43:18 +0000 (+0200) Subject: staging: mt7621-pci: fix PCIE_FTS_NUM_LO macro X-Git-Tag: v5.1.18~17 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7e5487c385591c7094b006e4bb300440eb899c7b;p=thirdparty%2Fkernel%2Fstable.git staging: mt7621-pci: fix PCIE_FTS_NUM_LO macro commit 0ae0cf509d28d8539b88b5f7f24558f5bfe57cdf upstream. Add missing parenthesis to PCIE_FTS_NUM_LO macro to do the same it was being done in original code. Fixes: a4b2eb912bb1 ("staging: mt7621-pci: rewrite RC FTS configuration") Signed-off-by: Sergio Paracuellos Cc: stable Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index 379ae780c6916..c1909ff5dee9c 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -40,7 +40,7 @@ /* MediaTek specific configuration registers */ #define PCIE_FTS_NUM 0x70c #define PCIE_FTS_NUM_MASK GENMASK(15, 8) -#define PCIE_FTS_NUM_L0(x) ((x) & 0xff << 8) +#define PCIE_FTS_NUM_L0(x) (((x) & 0xff) << 8) /* rt_sysc_membase relative registers */ #define RALINK_PCIE_CLK_GEN 0x7c