From: Luis Machado <luis.machado@arm.com>
Date: Mon, 19 Oct 2020 21:46:49 +0000 (-0300)
Subject: [Morello] Add preliminary core file register set support
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7ee6a16545097a15c93aae80ae487be6742d7315;p=thirdparty%2Fbinutils-gdb.git

[Morello] Add preliminary core file register set support

Add the register set that is going to be used to read core file data.

gdb/ChangeLog:

2020-10-20  Luis Machado  <luis.machado@arm.com>

	* aarch64-linux-tdep.c (aarch64_linux_cregmap)
	(aarch64_linux_cregset): New structs.
	(aarch64_linux_iterate_over_regset_sections): Check for capability
	registers.
	(aarch64_linux_init_abi): Initialize C register set numbers.
---

diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c
index ef5a8a9e75e..61753a2d7ea 100644
--- a/gdb/aarch64-linux-tdep.c
+++ b/gdb/aarch64-linux-tdep.c
@@ -560,6 +560,20 @@ static const struct regcache_map_entry aarch64_linux_fpregmap[] =
     { 0 }
   };
 
+/* Since the C register numbers are determined dynamically, we leave
+   placeholders so we can update the numbers later.  */
+static struct regcache_map_entry aarch64_linux_cregmap[] =
+  {
+    /* FIXME-Morello: Need to decide if we are reading the whole 16 bytes or
+       just the upper 8 bytes of the capability registers.  */
+    { 31, -1, 8 }, /* c0 ... c30 */
+    { 1, -1, 8 }, /* Stack Pointer Capability */
+    { 1, -1, 8 }, /* Program Counter Capability */
+    { 1, -1, 16 }, /* Default Data Capability */
+    { 1, -1, 8 },
+    { 0 }
+  };
+
 /* Register set definitions.  */
 
 const struct regset aarch64_linux_gregset =
@@ -574,6 +588,13 @@ const struct regset aarch64_linux_fpregset =
     regcache_supply_regset, regcache_collect_regset
   };
 
+/* The capability register set.  */
+const struct regset aarch64_linux_cregset =
+  {
+    aarch64_linux_cregmap,
+    regcache_supply_regset, regcache_collect_regset
+  };
+
 /* The fields in an SVE header at the start of a SVE regset.  */
 
 #define SVE_HEADER_SIZE_LENGTH		4
@@ -848,6 +869,15 @@ aarch64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
 	  AARCH64_LINUX_SIZEOF_TLSREGSET, &aarch64_linux_tls_regset,
 	  "TLS register", cb_data);
     }
+
+  /* FIXME-Morello: We still need to provide a valid check for the presence of
+     capability registers.  */
+  if (tdep->has_capability ())
+    {
+      cb (".reg-cap", AARCH64_LINUX_CREGS_SIZE,
+	  AARCH64_LINUX_CREGS_SIZE, &aarch64_linux_cregset,
+	  NULL, cb_data);
+    }
 }
 
 /* Implement the "core_read_description" gdbarch method.  */
@@ -2354,6 +2384,13 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 
   if (tdep->has_capability ())
     {
+      /* Initialize the register numbers for the core file register set.  */
+      /* FIXME-Morello: This needs to be updated.  */
+      aarch64_linux_cregmap[0].regno = tdep->cap_reg_base;
+      aarch64_linux_cregmap[1].regno = tdep->cap_reg_base + 32;
+      aarch64_linux_cregmap[2].regno = tdep->cap_reg_base + 31;
+      aarch64_linux_cregmap[3].regno = tdep->cap_reg_base + 33;
+
       set_gdbarch_report_signal_info (gdbarch,
 				      aarch64_linux_report_signal_info);
     }