From: Richard Sandiford Date: Mon, 8 Jul 2019 06:20:55 +0000 (+0000) Subject: [riscv] Fix ambiguous .md attribute uses X-Git-Tag: misc/cutover-git~4218 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=7ef004023510d0c88e1a8bb718ee2848c1358ea4;p=thirdparty%2Fgcc.git [riscv] Fix ambiguous .md attribute uses This patch is part of a series that fixes ambiguous attribute uses in .md files, i.e. cases in which attributes didn't use to specify an iterator, and in which could have different values depending on the iterator chosen. No behavioural change -- produces the same code as before. 2019-07-08 Richard Sandiford gcc/ * config/riscv/pic.md (*local_pic_load_s) (*local_pic_load_u): Explicitly specify the mode iterator referenced by , giving... (*local_pic_load_s, *local_pic_load_u): ...these. * config/riscv/riscv.md (*sge_) (*slt_, *sle_): Explicitly use for the mode attribute. From-SVN: r273191 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9f83f75b0bff..96ae53aa8b03 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2019-07-08 Richard Sandiford + + * config/riscv/pic.md (*local_pic_load_s) + (*local_pic_load_u): Explicitly specify the mode iterator + referenced by , giving... + (*local_pic_load_s, *local_pic_load_u): ...these. + * config/riscv/riscv.md (*sge_) + (*slt_, *sle_): Explicitly + use for the mode attribute. + 2019-07-07 Jeff Law PR tree-optimization/91090 diff --git a/gcc/config/riscv/pic.md b/gcc/config/riscv/pic.md index da303e4c9ddb..f16f0547dcd6 100644 --- a/gcc/config/riscv/pic.md +++ b/gcc/config/riscv/pic.md @@ -29,14 +29,14 @@ "\t%0,%1" [(set (attr "length") (const_int 8))]) -(define_insn "*local_pic_load_s" +(define_insn "*local_pic_load_s" [(set (match_operand:SUPERQI 0 "register_operand" "=r") (sign_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))] "USE_LOAD_ADDRESS_MACRO (operands[1])" "\t%0,%1" [(set (attr "length") (const_int 8))]) -(define_insn "*local_pic_load_u" +(define_insn "*local_pic_load_u" [(set (match_operand:SUPERQI 0 "register_operand" "=r") (zero_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))] "USE_LOAD_ADDRESS_MACRO (operands[1])" diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 309c109db4c6..0f4626656d60 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2054,7 +2054,7 @@ "" "slt%i2\t%0,zero,%1" [(set_attr "type" "slt") - (set_attr "mode" "")]) + (set_attr "mode" "")]) (define_insn "*slt_" [(set (match_operand:GPR 0 "register_operand" "= r") @@ -2063,7 +2063,7 @@ "" "slt%i2\t%0,%1,%2" [(set_attr "type" "slt") - (set_attr "mode" "")]) + (set_attr "mode" "")]) (define_insn "*sle_" [(set (match_operand:GPR 0 "register_operand" "=r") @@ -2075,7 +2075,7 @@ return "slt%i2\t%0,%1,%2"; } [(set_attr "type" "slt") - (set_attr "mode" "")]) + (set_attr "mode" "")]) ;; ;; ....................