From: Cao Jiaxi <driver1998@foxmail.com>
Date: Tue, 7 May 2019 11:55:03 +0000 (+0100)
Subject: util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64
X-Git-Tag: v4.1.0-rc0~125^2~6
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8041336ef74e19ca607c1601016333c986de8f9c;p=thirdparty%2Fqemu.git

util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64

Windows ARM64 uses LLP64 model, which breaks current assumptions.

Signed-off-by: Cao Jiaxi <driver1998@foxmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20190503003707.10185-1-driver1998@foxmail.com
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index 3cd080b83d1..eebe1ce9c5d 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -107,7 +107,7 @@ static void sys_cache_info(int *isize, int *dsize)
 static void arch_cache_info(int *isize, int *dsize)
 {
     if (*isize == 0 || *dsize == 0) {
-        unsigned long ctr;
+        uint64_t ctr;
 
         /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
            but (at least under Linux) these are marked protected by the