From: Vineet Gupta <vineetg@rivosinc.com>
Date: Tue, 23 Jul 2024 22:12:11 +0000 (-0700)
Subject: RISC-V: Fix snafu in SI mode splitters patch
X-Git-Tag: basepoints/gcc-16~7317
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=806927111cf388a2d8cd54072269601f677767cf;p=thirdparty%2Fgcc.git

RISC-V: Fix snafu in SI mode splitters patch

SPEC2017 perlbench for RISC-V was broke as runtime output mismatch
failure.

> 3830:  mbox2: dWshe3Aa1EULre4CT5O/ErYFrk+o/EOoebA1kTVjQVQQH2EjT5fHcYnwjj2MdBmZu5y3Ce4Ei4QQZo/SNrry9g
>        mbox2: uuWPimQiU0D4UrwFP+LS0lFNph4qL43WV1A6T3tHleatIOUaHixhrJU9NoA2lc9KjwYpdEL0lNTXkvo8ymNHzA
>               ^
> 3832:  mbox3: 8f4jdv6GIf0lX3DcdwRdEm6/aZwnmGX6n86GzCvmkwTKFXQjwlwVHc8jy8XlcyiIPr3yXTkgVOiP3cRYvyYQPg
>        mbox3: 9xQySgP6qbhfxl8Usu1WfGA5UhStB5AN31wueGM6OF4Jp59DkqJPu6ksGblOU5u0nQapQC1e9oYIs16a2mq2NA
>               ^
> specdiff run completed

Edwin bisected this to 273f16a125c4 ("[v3][RISC-V] Handle bit
manipulation of SImode values") which had the operands swapped in one
of the new splitters introduced.

No test as reducer narrows it to down to the exact test introduced by
the original commit.

gcc/ChangeLog:
	* config/riscv/bitmanip.md: Fix splitter.

Reported-by: Edwin Lu <ewlu@rivosinc.com>
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
---

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index f403ba8dbba..d262430485e 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -675,7 +675,7 @@
   "#"
   "&& reload_completed"
    [(set (match_dup 4) (match_dup 2))
-    (set (match_dup 4) (and:DI (not:DI (match_dup 4)) (match_dup 1)))
+    (set (match_dup 4) (and:DI (not:DI (match_dup 1)) (match_dup 4)))
     (set (match_dup 0) (any_or:DI (ashift:DI (const_int 1) (match_dup 5)) (match_dup 3)))]
   { operands[5] = gen_lowpart (QImode, operands[4]); }
   [(set_attr "type" "bitmanip")])