From: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue, 20 Aug 2024 00:19:08 +0000 (+0000)
Subject: Daily bump.
X-Git-Tag: basepoints/gcc-16~6524
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=80fda0ad3142c60dac0d5ef41c3e2141c9e8a521;p=thirdparty%2Fgcc.git

Daily bump.
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index efa473674b8..8167f0b5d93 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,345 @@
+2024-08-19  Andreas Schwab  <schwab@linux-m68k.org>
+
+	PR target/113939
+	* config/m68k/m68k.opt (mlra): New target option.
+	* config/m68k/m68k.cc (m68k_use_lra_p): New function.
+	(TARGET_LRA_P): Use it.
+	* config/m68k/m68k.opt.urls: Regenerate.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	PR target/112108
+	* config/aarch64/aarch64-builtins.cc (handle_arm_acle_h): Remove
+	feature check at initialisation.
+	(aarch64_general_check_builtin_call): Check ls64 intrinsics.
+	* config/aarch64/arm_acle.h: (data512_t) Make always available.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	PR target/112108
+	* config/aarch64/aarch64-builtins.cc (aarch64_init_memtag_builtins):
+	Define intrinsic names directly.
+	(aarch64_general_init_builtins): Move memtag intialisation...
+	(handle_arm_acle_h): ...to here, and remove feature check.
+	(aarch64_general_check_builtin_call): Check memtag intrinsics.
+	* config/aarch64/arm_acle.h (__arm_mte_create_random_tag)
+	(__arm_mte_exclude_tag, __arm_mte_ptrdiff)
+	(__arm_mte_increment_tag, __arm_mte_set_tag, __arm_mte_get_tag):
+	Remove.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	PR target/112108
+	* config/aarch64/aarch64-builtins.cc (aarch64_init_tme_builtins):
+	Define intrinsic names directly.
+	(aarch64_general_init_builtins): Move tme initialisation...
+	(handle_arm_acle_h): ...to here, and remove feature check.
+	(aarch64_general_check_builtin_call): Check tme intrinsics.
+	* config/aarch64/arm_acle.h (__tstart, __tcommit, __tcancel)
+	(__ttest): Remove.
+	(_TMFAILURE_*): Define unconditionally.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	* config/aarch64/aarch64-sve-builtins.cc (check_builtin_call)
+	(expand_builtin): Update calls to the below.
+	(report_missing_extension, report_missing_registers)
+	(check_required_extensions): Move out of aarch64_sve namespace,
+	rename, and move into...
+	* config/aarch64/aarch64-builtins.cc (aarch64_report_missing_extension)
+	(aarch64_report_missing_registers)
+	(aarch64_check_required_extensions) ...here.
+	* config/aarch64/aarch64-protos.h (aarch64_check_required_extensions):
+	Add prototype.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	* config/aarch64/aarch64-sve-builtins.cc
+	(check_required_registers): Remove target check and rename to...
+	(report_missing_registers): ...this.
+	(check_required_extensions): Refactor.
+
+2024-08-19  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	* config/aarch64/tuning_models/neoversev2.h (fp_reassoc_width):
+	Set to 4.
+	(tune_flags): Add AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
+
+2024-08-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+	* read-rtl.cc (rtx_reader::rtx_alloc_for_name): Allow all attribute
+	types to produce code 'values'.
+	(check_code_attribute): Rename ...
+	(check_attribute_codes): ... to this.  And change comments to refer to
+	* doc/md.texi: Add paragraph to document that you can use int and mode
+	attributes to produce codes.
+
+2024-08-19  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	* config/aarch64/aarch64-simd.md (mov<mode> for VSTRUCT_QD):
+	Expand 16-byte vector mode const0 store by TImode.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def: Add new builtins.
+	* config/i386/sse.md:
+	(<avx512>_scalef<mode><mask_name><round_name>): Add condition check.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md:
+	(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
+	Add condition check.
+	(<avx512>_rndscale<mode><mask_name><round_saeonly_name>): Ditto.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin):
+	Handle V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI_INT,
+	V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI_INT.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V8SF_FTYPE_V8SF_V8SF_UQI_INT, V4DF_FTYPE_V4DF_V4DF_UQI_INT,
+	V16HF_FTYPE_V16HF_V16HF_UHI_INT, V16HF_FTYPE_V16HF_INT_V16HF_UHI_INT,
+	V4DF_FTYPE_V4DF_INT_V4DF_UQI_INT, V8SF_FTYPE_V8SF_INT_V8SF_UQI_INT.
+	* config/i386/sse.md:
+	(<avx512>_getexp<mode><mask_name><round_saeonly_name>):
+	Add condition check.
+	(<avx512>_getmant<mode><mask_name><round_saeonly_name>):
+	Ditto.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md:
+	(<avx512>_fnmsub_<mode>_mask3<round_name>): Add condition check.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md:
+	(<avx512>_fmsub_<mode>_mask<round_name>): Add condition check.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md:
+	(<avx512>_fmaddsub_<mode>_mask<round_name>): Add condition check.
+	(<avx512>_fmaddsub_<mode>_mask3<round_name>): Ditto.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md:
+	(<avx512>_fmadd_<mode>_mask3<round_name>): Add condition check.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V16HF_FTYPE_V16HF_V16HF_INT, V16HF_FTYPE_V16HF_V16HF_V16HF_INT,
+	V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT,
+	V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI_INT,
+	V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI_INT.
+	* config/i386/sse.md:
+	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>):
+	Add condition check.
+	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Ditto.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V16HF_FTYPE_V16HI_V16HF_UHI_INT.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md
+	(unspec_fix_truncv8sfv8si2<mask_name>): Extend rounding control.
+	(<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
+	Ditto.
+	(<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):
+	Add condition check.
+	(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
+	Remove round_saeonly_name.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/sse.md (avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name>):
+	Extend round control for 256bit.
+	(unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<mask_name>):
+	Ditto.
+	(avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name><round_saeonly_name>):
+	Add condition check.
+	* config/i386/subst.md
+	(round_saeonly_mode_condition): Add V16HI check for 256bit.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V4DF_FTYPE_V4DI_V4DF_UQI_INT, V4SF_FTYPE_V4DI_V4SF_UQI_INT,
+	V8HF_FTYPE_V4DI_V8HF_UQI_INT.
+	* config/i386/sse.md:
+	(avx512fp16_vcvt<floatsuffix>qq2ph_v4di_mask_round): New expand.
+	(*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask):
+	Extend round control and add "_1" suffix.
+	(float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
+	Add condition check.
+	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
+	Ditto.
+	(float<floatunssuffix><mode><ssePSmode2lower>2<mask_name><round_name>):
+	Limit suffix output.
+	(unspec_fix_truncv4dfv4si2<mask_name>): Extend round control.
+	(unspec_fixuns_truncv4dfv4si2<mask_name>): Ditto.
+	* config/i386/subst.md (round_qq2pssuff): New iterator.
+	(round_saeonly_suff): Ditto.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V8SI_FTYPE_V8SF_V8SI_UQI_INT, V4DI_FTYPE_V4SF_V4DI_UQI_INT.
+	* config/i386/sse.md
+	(<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>):
+	Extend to round.
+	(<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
+	Add round condition check.
+	* config/i386/subst.md (round_constraint4): New.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V16HI_FTYPE_V16HF_V16HI_UHI_INT, V4DF_FTYPE_V4SF_V4DF_UQI_INT
+	V8HF_FTYPE_V8SF_V8HF_UQI_INT.
+	* config/i386/sse.md
+	(avx512fp16_vcvt<castmode>2ph_<mode><mask_name><round_name>):
+	Add round condition check.
+	* config/i386/subst.md (round_mode_condition): Add V16HI check for
+	256bit.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: New intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V8SF_FTYPE_V8HF_V8SF_UQI_INT, V8SI_FTYPE_V8HF_V8SI_UQI_INT,
+	V4DF_FTYPE_V8HF_V4DF_UQI_INT, V4DI_FTYPE_V8HF_V4DI_UQI_INT.
+	* config/i386/sse.md:
+	(avx512fp16_float_extend_ph<mode>2<mask_name><round_saeonly_name>):
+	Add condition check.
+	(avx512fp16_vcvtph2<sseintconvertsignprefix><sseintconvert>_<mode>
+	<mask_name><round_name>):
+	Ditto.
+	(avx512fp16_float_extend_ph<mode>2<mask_name>): Extend round saeonly.
+	(vcvtph2ps256<mask_name>): Ditto.
+	* config/i386/subst.md
+	(round_saeonly_applied): New condition.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: Add new intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V4DI_FTYPE_V4DF_V4DI_UQI_INT, V4SI_FTYPE_V4DF_V4SI_UQI_INT.
+	* config/i386/sse.md:
+	(avx_cvtpd2dq256<mask_name>): Change name to
+	avx_cvtpd2dq256<mask_name><round_name> and extend pattern to
+	generate 256bit insns.
+	(fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
+	Add round_mode_condition.
+	* config/i386/subst.md (round_pd2udqsuff): New iterator.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config/i386/avx10_2roundingintrin.h: Add new intrins.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V8SF_FTYPE_V8SI_V8SF_UQI_INT, V4SF_FTYPE_V4DF_V4SF_UQI_INT,
+	V8HF_FTYPE_V8SI_V8HF_UQI_INT, V8HF_FTYPE_V4DF_V8HF_UQI_INT.
+	* config/i386/sse.md:
+	(avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode><mask_name><round_name>):
+	Add condition check.
+	(avx512fp16_vcvtpd2ph_v4df_mask_round): New expand.
+	(*avx512fp16_vcvt<castmode>2ph_<mode>_mask): Change name to
+	avx512fp16_vcvt<castmode>2ph_<mode>_mask<round_name>_1
+	and extend pattern to generate 256bit insns.
+	(avx_cvtpd2ps256<mask_name>): Change name to
+	avx_cvtpd2ps256<mask_name><round_name> and extend pattern to
+	generate 256bit insns.
+	* config/i386/subst.md (round_applied): New condition.
+	(round_suff): New iterator.
+	(round_mode_condition): Add V32HI check for 512bit.
+	(round_saeonly_mode_condition): Ditto.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* config.gcc: Add avx10_2roundingintrin.h.
+	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
+	* config/i386/i386-builtin.def (BDESC): Add new builtins.
+	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
+	V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT, V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT,
+	V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT, UQI_FTYPE_V4DF_V4DF_INT_UQI_INT,
+	UHI_FTYPE_V16HF_V16HF_INT_UHI_INT, UQI_FTYPE_V8SF_V8SF_INT_UQI_INT.
+	* config/i386/immintrin.h: Include avx10_2roundingintrin.h.
+	* config/i386/sse.md: Change subst_attr name due to renaming.
+	* config/i386/subst.md:
+	(<round_mode512bit_condition>): Add condition check for avx10.2
+	rounding control 256bit intrins and renamed to ...
+	(<round_mode_condition>): ...this.
+	(round_saeonly_mode512bit_condition): Add condition check for
+	avx10.2 rounding control 256 bit intris and renamed to ...
+	(round_saeonly_mode_condition): ...this.
+	* config/i386/avx10_2roundingintrin.h: New file.
+
 2024-08-18  Jeff Law  <jlaw@ventanamicro.com>
 
 	PR rtl-optimization/115876
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 6197155f323..0ed256ba1fe 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240819
+20240820
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 04552dd3676..2269b2fd6df 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,12 @@
+2024-08-19  Arsen Arsenović  <arsen@aarsen.me>
+
+	PR ada/115917
+	* gnatvsn.ads: Add note about the duplication of this value in
+	version.c.
+	* version.c (VER_LEN_MAX): Define to the same value as
+	Gnatvsn.Ver_Len_Max.
+	(gnat_version_string): Use VER_LEN_MAX as bound.
+
 2024-08-08  Steve Baird  <baird@adacore.com>
 
 	* sem_ch6.adb (Check_Discriminant_Conformance): Perform check for
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 4ae22db6f2e..5c0c5777fa2 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,15 @@
+2024-08-19  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/115657
+	* decl.cc (build_enumerator): Call maybe_fold_non_dependent_expr
+	instead of fold_non_dependent_expr.
+
+2024-08-19  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/116384
+	* pt.cc (tsubst_expr) <case IMPLICIT_CONV_EXPR>: Bail if tsubst
+	returns error_mark_node.
+
 2024-08-16  Jakub Jelinek  <jakub@redhat.com>
 
 	PR c++/110345
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index c8ba754fc6b..58d0ef57cff 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,19 @@
+2024-08-19  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+	PR fortran/46371
+	PR fortran/56496
+	* expr.cc (gfc_is_coindexed): Detect is coindexed also when
+	rewritten to caf_get.
+	* trans-stmt.cc (trans_associate_var): Always accept a
+	descriptor for coarrays.
+
+2024-08-19  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+	PR fortran/84244
+	* trans-types.cc (gfc_get_derived_type): When a caf_sub_token is
+	generated for a component, link it to the component it is
+	generated for (the previous one).
+
 2024-08-16  Harald Anlauf  <anlauf@gmx.de>
 
 	PR fortran/114146
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 99a88282067..0d3f19b56c1 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,258 @@
+2024-08-19  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/115657
+	* g++.dg/cpp1y/constexpr-recursion2.C: New test.
+	* g++.dg/template/conv21.C: New test.
+
+2024-08-19  Marek Polacek  <polacek@redhat.com>
+
+	PR c++/116384
+	* g++.dg/cpp0x/vt-116384.C: New test.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	PR target/112108
+	* gcc.target/aarch64/acle/ls64_guard-1.c: New test.
+	* gcc.target/aarch64/acle/ls64_guard-2.c: New test.
+	* gcc.target/aarch64/acle/ls64_guard-3.c: New test.
+	* gcc.target/aarch64/acle/ls64_guard-4.c: New test.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	PR target/112108
+	* gcc.target/aarch64/acle/memtag_guard-1.c: New test.
+	* gcc.target/aarch64/acle/memtag_guard-2.c: New test.
+	* gcc.target/aarch64/acle/memtag_guard-3.c: New test.
+	* gcc.target/aarch64/acle/memtag_guard-4.c: New test.
+
+2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	PR target/112108
+	* gcc.target/aarch64/acle/tme_guard-1.c: New test.
+	* gcc.target/aarch64/acle/tme_guard-2.c: New test.
+	* gcc.target/aarch64/acle/tme_guard-3.c: New test.
+	* gcc.target/aarch64/acle/tme_guard-4.c: New test.
+
+2024-08-19  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+	* gfortran.dg/coarray/select_type_1.f90: New test.
+	* gfortran.dg/coarray/select_type_2.f90: New test.
+	* gfortran.dg/coarray/select_type_3.f90: New test.
+
+2024-08-19  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	* g++.dg/warn/pr33738-2.C: dg-prune arm linker messages about
+	size of enums.
+
+2024-08-19  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* lib/scanltranstree.exp: Redefine the routines using two
+	templates.
+
+2024-08-19  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+	PR fortran/84244
+	* gfortran.dg/coarray/ptr_comp_5.f08: New test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: New test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: New test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-3.c: New test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-2.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-2.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-2.c: New test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-1.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-1.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Add new macro test.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-1.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/sse-14.c: Add new macro test.
+	* gcc.target/i386/sse-22.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-1.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add new builtin test.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/sse-14.c: Add new macro test.
+	* gcc.target/i386/sse-22.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-1.c: Add test.
+
+2024-08-19  Hu, Lin1  <lin1.hu@intel.com>
+
+	* gcc.target/i386/avx-1.c: Add -mavx10.2 and new builtin test.
+	* gcc.target/i386/avx-2.c: Ditto.
+	* gcc.target/i386/sse-13.c: Add new tests.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Ditto.
+	* gcc.target/i386/avx10_2-rounding-1.c: New test.
+
 2024-08-18  Andrew Pinski  <quic_apinski@quicinc.com>
 
 	* gcc.target/i386/pr87007-5.c: Disable phi-opt.