From: Robert Kausch <robert.kausch@freac.org>
Date: Mon, 19 Jan 2026 15:41:14 +0000 (+0100)
Subject: Test feature macros in all implementation files
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=81c834de5d7526ee8c843f85bfe1942360f6a278;p=thirdparty%2Fzlib-ng.git

Test feature macros in all implementation files
---

diff --git a/arch/arm/arm_features.c b/arch/arm/arm_features.c
index 625144097..ce5ab9d0e 100644
--- a/arch/arm/arm_features.c
+++ b/arch/arm/arm_features.c
@@ -1,6 +1,8 @@
 #include "zbuild.h"
 #include "arm_features.h"
 
+#ifdef ARM_FEATURES
+
 #if defined(HAVE_SYS_AUXV_H)
 #  include <sys/auxv.h>
 #  ifdef ARM_ASM_HWCAP
@@ -328,3 +330,5 @@ void Z_INTERNAL arm_check_features(struct arm_cpu_features *features) {
     features->has_eor3 = arm_has_eor3();
     features->has_fast_pmull = features->has_pmull && arm_cpu_has_fast_pmull();
 }
+
+#endif
diff --git a/arch/loongarch/loongarch_features.c b/arch/loongarch/loongarch_features.c
index d044817e5..0ebd8b4eb 100644
--- a/arch/loongarch/loongarch_features.c
+++ b/arch/loongarch/loongarch_features.c
@@ -8,6 +8,8 @@
 #include "zbuild.h"
 #include "loongarch_features.h"
 
+#ifdef LOONGARCH_FEATURES
+
 #include <larchintrin.h>
 
 /*
@@ -25,3 +27,5 @@ void Z_INTERNAL loongarch_check_features(struct loongarch_cpu_features *features
     features->has_lsx = w1 & 0x40;
     features->has_lasx = w1 & 0x80;
 }
+
+#endif
diff --git a/arch/loongarch/slide_hash_lasx.c b/arch/loongarch/slide_hash_lasx.c
index 0779d9abe..335ed5c36 100644
--- a/arch/loongarch/slide_hash_lasx.c
+++ b/arch/loongarch/slide_hash_lasx.c
@@ -13,6 +13,8 @@
 #include "zbuild.h"
 #include "deflate.h"
 
+#ifdef LOONGARCH_LASX
+
 #include <lasxintrin.h>
 
 static inline void slide_hash_chain(Pos *table, uint32_t entries, const __m256i wsize) {
@@ -39,3 +41,5 @@ Z_INTERNAL void slide_hash_lasx(deflate_state *s) {
     slide_hash_chain(s->head, HASH_SIZE, ymm_wsize);
     slide_hash_chain(s->prev, wsize, ymm_wsize);
 }
+
+#endif
diff --git a/arch/loongarch/slide_hash_lsx.c b/arch/loongarch/slide_hash_lsx.c
index ad235c47d..4bd68a849 100644
--- a/arch/loongarch/slide_hash_lsx.c
+++ b/arch/loongarch/slide_hash_lsx.c
@@ -12,6 +12,8 @@
 #include "zbuild.h"
 #include "deflate.h"
 
+#ifdef LOONGARCH_LSX
+
 #include <lsxintrin.h>
 #include <assert.h>
 
@@ -62,3 +64,5 @@ Z_INTERNAL void slide_hash_lsx(deflate_state *s) {
 
     slide_hash_chain(s->head, s->prev, HASH_SIZE, wsize, xmm_wsize);
 }
+
+#endif
diff --git a/arch/power/crc32_power8.c b/arch/power/crc32_power8.c
index 05e117023..0ec574e6e 100644
--- a/arch/power/crc32_power8.c
+++ b/arch/power/crc32_power8.c
@@ -25,6 +25,8 @@
  * This code uses gcc vector builtins instead using assembly directly.
  */
 
+#ifdef POWER8_VSX_CRC32
+
 #include <altivec.h>
 #include "zendian.h"
 #include "zbuild.h"
@@ -588,3 +590,5 @@ static unsigned int ALIGNED_(32) __crc32_vpmsum(unsigned int crc, const void* p,
     return v0[1];
 #endif
 }
+
+#endif
diff --git a/arch/riscv/chunkset_rvv.c b/arch/riscv/chunkset_rvv.c
index 48776360e..c8db1dc43 100644
--- a/arch/riscv/chunkset_rvv.c
+++ b/arch/riscv/chunkset_rvv.c
@@ -3,6 +3,9 @@
  * Contributed by Alex Chiang <alex.chiang@sifive.com>
  * For conditions of distribution and use, see copyright notice in zlib.h
  */
+
+#ifdef RISCV_RVV
+
 #include <riscv_vector.h>
 #include "zbuild.h"
 
@@ -118,3 +121,5 @@ static inline uint8_t* CHUNKCOPY(uint8_t *out, uint8_t const *from, unsigned len
 #define INFLATE_FAST     inflate_fast_rvv
 
 #include "inffast_tpl.h"
+
+#endif
diff --git a/arch/riscv/riscv_features.c b/arch/riscv/riscv_features.c
index 7c04a0eec..5b2ceae1e 100644
--- a/arch/riscv/riscv_features.c
+++ b/arch/riscv/riscv_features.c
@@ -1,3 +1,5 @@
+#ifdef RISCV_FEATURES
+
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -44,3 +46,5 @@ void Z_INTERNAL riscv_check_features(struct riscv_cpu_features *features) {
     }
 #endif
 }
+
+#endif
diff --git a/arch/s390/crc32-vx.c b/arch/s390/crc32-vx.c
index de805d150..085ee2328 100644
--- a/arch/s390/crc32-vx.c
+++ b/arch/s390/crc32-vx.c
@@ -15,6 +15,8 @@
 #include "zbuild.h"
 #include "arch_functions.h"
 
+#ifdef S390_CRC32_VX
+
 #include <vecintrin.h>
 
 typedef unsigned char uv16qi __attribute__((vector_size(16)));
@@ -226,3 +228,5 @@ Z_INTERNAL uint32_t crc32_copy_s390_vx(uint32_t crc, uint8_t *dst, const uint8_t
     memcpy(dst, src, len);
     return crc;
 }
+
+#endif
diff --git a/arch/s390/dfltcc_deflate.c b/arch/s390/dfltcc_deflate.c
index f94950033..5cbd700c6 100644
--- a/arch/s390/dfltcc_deflate.c
+++ b/arch/s390/dfltcc_deflate.c
@@ -13,6 +13,8 @@
         $ make
 */
 
+#ifdef S390_DFLTCC_DEFLATE
+
 #include "zbuild.h"
 #include "deflate.h"
 #include "deflate_p.h"
@@ -384,3 +386,5 @@ int Z_INTERNAL PREFIX(dfltcc_deflate_get_dictionary)(PREFIX3(streamp) strm, unsi
         *dict_length = param->hl;
     return Z_OK;
 }
+
+#endif
diff --git a/arch/s390/dfltcc_inflate.c b/arch/s390/dfltcc_inflate.c
index cc3cb3978..f6bc423c2 100644
--- a/arch/s390/dfltcc_inflate.c
+++ b/arch/s390/dfltcc_inflate.c
@@ -13,6 +13,8 @@
         $ make
 */
 
+#ifdef S390_DFLTCC_INFLATE
+
 #include "zbuild.h"
 #include "zutil.h"
 #include "inftrees.h"
@@ -189,3 +191,5 @@ int Z_INTERNAL PREFIX(dfltcc_inflate_get_dictionary)(PREFIX3(streamp) strm,
         *dict_length = param->hl;
     return Z_OK;
 }
+
+#endif
diff --git a/arch/s390/s390_features.c b/arch/s390/s390_features.c
index 1f90a926c..deef58a5c 100644
--- a/arch/s390/s390_features.c
+++ b/arch/s390/s390_features.c
@@ -1,6 +1,8 @@
 #include "zbuild.h"
 #include "s390_features.h"
 
+#ifdef S390_FEATURES
+
 #ifdef HAVE_SYS_AUXV_H
 #  include <sys/auxv.h>
 #endif
@@ -12,3 +14,5 @@
 void Z_INTERNAL s390_check_features(struct s390_cpu_features *features) {
     features->has_vx = getauxval(AT_HWCAP) & HWCAP_S390_VXRS;
 }
+
+#endif
diff --git a/arch/x86/adler32_sse42.c b/arch/x86/adler32_sse42.c
index e91784886..a30b77531 100644
--- a/arch/x86/adler32_sse42.c
+++ b/arch/x86/adler32_sse42.c
@@ -9,10 +9,11 @@
 #include "zbuild.h"
 #include "adler32_p.h"
 #include "adler32_ssse3_p.h"
-#include <immintrin.h>
 
 #ifdef X86_SSE42
 
+#include <immintrin.h>
+
 Z_INTERNAL uint32_t adler32_copy_sse42(uint32_t adler, uint8_t *dst, const uint8_t *src, size_t len) {
     uint32_t adler0, adler1;
     adler1 = (adler >> 16) & 0xffff;
diff --git a/arch/x86/slide_hash_avx2.c b/arch/x86/slide_hash_avx2.c
index 100001239..8efa0d0c5 100644
--- a/arch/x86/slide_hash_avx2.c
+++ b/arch/x86/slide_hash_avx2.c
@@ -12,6 +12,8 @@
 #include "zbuild.h"
 #include "deflate.h"
 
+#ifdef X86_AVX2
+
 #include <immintrin.h>
 
 static inline void slide_hash_chain(Pos *table, uint32_t entries, const __m256i wsize) {
@@ -38,3 +40,5 @@ Z_INTERNAL void slide_hash_avx2(deflate_state *s) {
     slide_hash_chain(s->head, HASH_SIZE, ymm_wsize);
     slide_hash_chain(s->prev, wsize, ymm_wsize);
 }
+
+#endif
diff --git a/arch/x86/slide_hash_sse2.c b/arch/x86/slide_hash_sse2.c
index 6900a59d1..fff182499 100644
--- a/arch/x86/slide_hash_sse2.c
+++ b/arch/x86/slide_hash_sse2.c
@@ -11,6 +11,8 @@
 #include "zbuild.h"
 #include "deflate.h"
 
+#ifdef X86_SSE2
+
 #include <immintrin.h>
 #include <assert.h>
 
@@ -61,3 +63,5 @@ Z_INTERNAL void slide_hash_sse2(deflate_state *s) {
 
     slide_hash_chain(s->head, s->prev, HASH_SIZE, wsize, xmm_wsize);
 }
+
+#endif
diff --git a/arch/x86/x86_features.c b/arch/x86/x86_features.c
index bed1df3d1..0ae706bb5 100644
--- a/arch/x86/x86_features.c
+++ b/arch/x86/x86_features.c
@@ -10,6 +10,7 @@
 #include "zbuild.h"
 #include "x86_features.h"
 
+#ifdef X86_FEATURES
 
 #if defined(HAVE_CPUID_MS)
 #   include <intrin.h>
@@ -125,3 +126,5 @@ void Z_INTERNAL x86_check_features(struct x86_cpu_features *features) {
         }
     }
 }
+
+#endif