From: Denis Chertykov <denisc@gcc.gnu.org>
Date: Sun, 6 Apr 2014 19:09:36 +0000 (+0400)
Subject: invoke.texi: Add info for __AVR_ISA_RMW__ builtin macro
X-Git-Tag: basepoints/gcc-5~57
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=832e00167326d5f804e2f434fc326090b90465a4;p=thirdparty%2Fgcc.git

invoke.texi: Add info for __AVR_ISA_RMW__ builtin macro

	* doc/invoke.texi: Add info for __AVR_ISA_RMW__ builtin macro

From-SVN: r209169
---

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4bf686660deb..80a93e14b0f2 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12983,6 +12983,9 @@ instructions because of a hardware erratum.  Skip instructions are
 The second macro is only defined if @code{__AVR_HAVE_JMP_CALL__} is also
 set.
 
+@item __AVR_ISA_RMW__
+The device has Read-Modify-Write instructions (XCH, LAC, LAS and LAT).
+
 @item __AVR_SFR_OFFSET__=@var{offset}
 Instructions that can address I/O special function registers directly
 like @code{IN}, @code{OUT}, @code{SBI}, etc.@: may use a different