From: Richard Earnshaw Date: Wed, 23 Nov 2011 10:50:53 +0000 (+0000) Subject: 2011-11-23 Thomas Klein X-Git-Tag: gdb_7_4-2011-12-13-branchpoint~191 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=837b3435bc80eade8aa655030173560af3be609c;p=thirdparty%2Fbinutils-gdb.git 2011-11-23 Thomas Klein * config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV with two low register at arch v4t or v5t when assember using unified syntax. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index e385881d04c..9348a20671b 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2011-11-23 Thomas Klein + + * config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV + with two low register at arch v4t or v5t when assember using + unified syntax. + 2011-11-21 DJ Delorie * config/rl78-defs.h (rl78_error): Add "const". diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index e8040c384f9..bf44228c13d 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -10913,6 +10913,11 @@ do_t_mov_cmp (void) switch (inst.instruction) { case T_MNEM_mov: + /* In v4t or v5t a move of two lowregs produces unpredictable + results. Don't allow this.*/ + constraint (low_regs && !ARM_CPU_HAS_FEATURE (selected_cpu, + arm_ext_v6),"MOV Rd, Rs with two low registers is not " + "permitted on this architecture"); inst.instruction = T_OPCODE_MOV_HR; inst.instruction |= (Rn & 0x8) << 4; inst.instruction |= (Rn & 0x7);