From: Jakub Jelinek Date: Tue, 19 Jul 2011 13:09:48 +0000 (+0200) Subject: backport: re PR target/49621 (ICE in trunc_int_for_mode, at explow.c:57) X-Git-Tag: releases/gcc-4.5.4~522 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=83aae75fc270850259a7480adf834ba501b76c2f;p=thirdparty%2Fgcc.git backport: re PR target/49621 (ICE in trunc_int_for_mode, at explow.c:57) Backport from mainline 2011-07-08 Jakub Jelinek PR target/49621 * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use CONST0_RTX (dest_mode) instead of const0_rtx as second operand of NE. * config/rs6000/vector.md (vector_select_, vector_select__uns): Change second operand of NE to CONST0_RTX (mode) instead of const0_rtx. * config/rs6000/altivec.md (*altivec_vsel, *altivec_vsel_uns): Expect second operand of NE to be zero_constant of the corresponding vector mode. * config/rs6000/vsx.md (*vsx_xxsel, *vsx_xxsel_uns): Likewise. * gcc.target/powerpc/altivec-34.c: New test. From-SVN: r176458 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 13ce2dee8dc5..4cce9b5bcfb4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,21 @@ 2011-07-19 Jakub Jelinek Backport from mainline + 2011-07-08 Jakub Jelinek + + PR target/49621 + * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use + CONST0_RTX (dest_mode) instead of const0_rtx as second operand + of NE. + * config/rs6000/vector.md (vector_select_, + vector_select__uns): Change second operand of NE to + CONST0_RTX (mode) instead of const0_rtx. + * config/rs6000/altivec.md (*altivec_vsel, + *altivec_vsel_uns): Expect second operand of NE to be + zero_constant of the corresponding vector mode. + * config/rs6000/vsx.md (*vsx_xxsel, *vsx_xxsel_uns): + Likewise. + 2011-07-07 Jakub Jelinek PR c/49644 diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 0745b3a2f564..d4967fb6ca85 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -497,7 +497,7 @@ [(set (match_operand:VM 0 "altivec_register_operand" "=v") (if_then_else:VM (ne:CC (match_operand:VM 1 "altivec_register_operand" "v") - (const_int 0)) + (match_operand:VM 4 "zero_constant" "")) (match_operand:VM 2 "altivec_register_operand" "v") (match_operand:VM 3 "altivec_register_operand" "v")))] "VECTOR_MEM_ALTIVEC_P (mode)" @@ -508,7 +508,7 @@ [(set (match_operand:VM 0 "altivec_register_operand" "=v") (if_then_else:VM (ne:CCUNS (match_operand:VM 1 "altivec_register_operand" "v") - (const_int 0)) + (match_operand:VM 4 "zero_constant" "")) (match_operand:VM 2 "altivec_register_operand" "v") (match_operand:VM 3 "altivec_register_operand" "v")))] "VECTOR_MEM_ALTIVEC_P (mode)" diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 0582dba7c72b..27956c52eb78 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -16007,7 +16007,7 @@ rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, rtx op_false, op_false = tmp; } - cond2 = gen_rtx_fmt_ee (NE, cc_mode, mask, const0_rtx); + cond2 = gen_rtx_fmt_ee (NE, cc_mode, mask, CONST0_RTX (dest_mode)); emit_insn (gen_rtx_SET (VOIDmode, dest, gen_rtx_IF_THEN_ELSE (dest_mode, diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index 5e462b915bfc..73d2ae0f77ef 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -447,21 +447,21 @@ [(set (match_operand:VEC_L 0 "vlogical_operand" "") (if_then_else:VEC_L (ne:CC (match_operand:VEC_L 3 "vlogical_operand" "") - (const_int 0)) + (match_dup 4)) (match_operand:VEC_L 2 "vlogical_operand" "") (match_operand:VEC_L 1 "vlogical_operand" "")))] "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" - "") + "operands[4] = CONST0_RTX (mode);") (define_expand "vector_select__uns" [(set (match_operand:VEC_L 0 "vlogical_operand" "") (if_then_else:VEC_L (ne:CCUNS (match_operand:VEC_L 3 "vlogical_operand" "") - (const_int 0)) + (match_dup 4)) (match_operand:VEC_L 2 "vlogical_operand" "") (match_operand:VEC_L 1 "vlogical_operand" "")))] "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" - "") + "operands[4] = CONST0_RTX (mode);") ;; Expansions that compare vectors producing a vector result and a predicate, ;; setting CR6 to indicate a combined status diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 91052a8a2358..827f0343bcb5 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -844,7 +844,7 @@ [(set (match_operand:VSX_L 0 "vsx_register_operand" "=,?wa") (if_then_else:VSX_L (ne:CC (match_operand:VSX_L 1 "vsx_register_operand" ",wa") - (const_int 0)) + (match_operand:VSX_L 4 "zero_constant" "")) (match_operand:VSX_L 2 "vsx_register_operand" ",wa") (match_operand:VSX_L 3 "vsx_register_operand" ",wa")))] "VECTOR_MEM_VSX_P (mode)" @@ -855,7 +855,7 @@ [(set (match_operand:VSX_L 0 "vsx_register_operand" "=,?wa") (if_then_else:VSX_L (ne:CCUNS (match_operand:VSX_L 1 "vsx_register_operand" ",wa") - (const_int 0)) + (match_operand:VSX_L 4 "zero_constant" "")) (match_operand:VSX_L 2 "vsx_register_operand" ",wa") (match_operand:VSX_L 3 "vsx_register_operand" ",wa")))] "VECTOR_MEM_VSX_P (mode)" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index aa95f8a2fed0..b22da57f4726 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,6 +1,11 @@ 2011-07-19 Jakub Jelinek Backport from mainline + 2011-07-08 Jakub Jelinek + + PR target/49621 + * gcc.target/powerpc/altivec-34.c: New test. + 2011-07-07 Jakub Jelinek PR c/49644 diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-34.c b/gcc/testsuite/gcc.target/powerpc/altivec-34.c new file mode 100644 index 000000000000..8e6372bfb43d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/altivec-34.c @@ -0,0 +1,24 @@ +/* PR target/49621 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -maltivec" } */ + +#include + +int +foo (void) +{ + vector unsigned a, b, c; + unsigned k = 1; + + a = (vector unsigned) { 0, 0, 0, 1 }; + b = c = (vector unsigned) { 0, 0, 0, 0 }; + + a = vec_add (a, vec_splats (k)); + b = vec_add (b, a); + c = vec_sel (c, a, b); + + if (vec_any_eq (b, c)) + return 1; + + return 0; +}