From: Josef Weidendorfer <Josef.Weidendorfer@gmx.de>
Date: Mon, 26 Nov 2012 18:16:58 +0000 (+0000)
Subject: Before LL, instrument outstanding helper calls.
X-Git-Tag: svn/VALGRIND_3_9_0~529
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=840c6d843752b2a5ee54c7685bafca0165ff6e10;p=thirdparty%2Fvalgrind.git

Before LL, instrument outstanding helper calls.

Callgrind, Cachegrind, and Lackey call
helpers for memory accesses in bunches, to reduce
register save/restore overhead (and merge load/store
within same instruction into a "modify" event).

The calls should not be done within a RMW section
enclosed by LL/SC instructions, as this reduces the
chance of SC to succeed, and can result in hangs.
For Callgrind, this definitly helped MIPS, and was
committed in r13136. Do the same for Cachegrind/Lackey.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13143
---

diff --git a/cachegrind/cg_main.c b/cachegrind/cg_main.c
index 6937d02baa..2ce661e373 100644
--- a/cachegrind/cg_main.c
+++ b/cachegrind/cg_main.c
@@ -1154,6 +1154,8 @@ IRSB* cg_instrument ( VgCallbackClosure* closure,
                dataTy = typeOfIRTemp(tyenv, st->Ist.LLSC.result);
                addEvent_Dr( &cgs, curr_inode,
                             sizeofIRType(dataTy), st->Ist.LLSC.addr );
+               /* flush events before LL, should help SC to succeed */
+               flushEvents( &cgs );
             } else {
                /* SC */
                dataTy = typeOfIRExpr(tyenv, st->Ist.LLSC.storedata);
diff --git a/lackey/lk_main.c b/lackey/lk_main.c
index 42a0552b16..735bc3af1d 100644
--- a/lackey/lk_main.c
+++ b/lackey/lk_main.c
@@ -428,7 +428,8 @@ typedef
    At various points the list will need to be flushed, that is, IR
    generated from it.  That must happen before any possible exit from
    the block (the end, or an IRStmt_Exit).  Flushing also takes place
-   when there is no space to add a new event.
+   when there is no space to add a new event, and before entering a
+   RMW (read-modify-write) section on processors supporting LL/SC.
 
    If we require the simulation statistics to be up to date with
    respect to possible memory exceptions, then the list would have to
@@ -825,9 +826,12 @@ IRSB* lk_instrument ( VgCallbackClosure* closure,
             if (st->Ist.LLSC.storedata == NULL) {
                /* LL */
                dataTy = typeOfIRTemp(tyenv, st->Ist.LLSC.result);
-               if (clo_trace_mem)
+               if (clo_trace_mem) {
                   addEvent_Dr( sbOut, st->Ist.LLSC.addr,
                                       sizeofIRType(dataTy) );
+                  /* flush events before LL, helps SC to succeed */
+                  flushEvents(sbOut);
+	       }
                if (clo_detailed_counts)
                   instrument_detail( sbOut, OpLoad, dataTy );
             } else {