From: Maciej W. Rozycki <macro@codesourcery.com>
Date: Fri, 22 Aug 2014 15:42:12 +0000 (+0100)
Subject: ARM/opcodes: Fix negative hexadecimal offset disassembly
X-Git-Tag: binutils-2_25~507
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=84919466a87f5ce10cc1af8ef51d7ab9ea66ff5e;p=thirdparty%2Fbinutils-gdb.git

ARM/opcodes: Fix negative hexadecimal offset disassembly

2014-08-21  Nathan Sidwell  <nathan@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	opcodes/
	* arm-dis.c (print_arm_address): Negate the GPR-relative offset
	returned if the U bit is set.

2014-08-21  Paul Brook  <paul@codesourcery.com>

	gas/testsuite/
	* gas/arm/arch7a-mp.d: Adjust according to `print_arm_address'
	offset fix.
	* gas/arm/arch7r-mp.d: Likewise.
---

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 88b49eebb92..edba881a5ff 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2014-08-22  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/arch7a-mp.d: Adjust according to `print_arm_address'
+	offset fix.
+	* gas/arm/arch7r-mp.d: Likewise.
+
 2014-08-21  Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* gas/mips/mips.exp: Correct indentation.
diff --git a/gas/testsuite/gas/arm/arch7a-mp.d b/gas/testsuite/gas/arm/arch7a-mp.d
index bf6c6da6d5f..85a1a014ece 100644
--- a/gas/testsuite/gas/arm/arch7a-mp.d
+++ b/gas/testsuite/gas/arm/arch7a-mp.d
@@ -11,7 +11,7 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> f59ef000 	pldw	\[lr\]
 0[0-9a-f]+ <[^>]+> f591f000 	pldw	\[r1\]
 0[0-9a-f]+ <[^>]+> f590ffff 	pldw	\[r0, #4095\]	; 0xfff
-0[0-9a-f]+ <[^>]+> f510ffff 	pldw	\[r0, #-4095\]	; 0xfff
+0[0-9a-f]+ <[^>]+> f510ffff 	pldw	\[r0, #-4095\]	; 0xfffff001
 0[0-9a-f]+ <[^>]+> f790f000 	pldw	\[r0, r0\]
 0[0-9a-f]+ <[^>]+> f791f000 	pldw	\[r1, r0\]
 0[0-9a-f]+ <[^>]+> f79ef000 	pldw	\[lr, r0\]
diff --git a/gas/testsuite/gas/arm/arch7r-mp.d b/gas/testsuite/gas/arm/arch7r-mp.d
index 8908c98c727..b6efd6a934e 100644
--- a/gas/testsuite/gas/arm/arch7r-mp.d
+++ b/gas/testsuite/gas/arm/arch7r-mp.d
@@ -10,7 +10,7 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> f59ef000 	pldw	\[lr\]
 0[0-9a-f]+ <[^>]+> f591f000 	pldw	\[r1\]
 0[0-9a-f]+ <[^>]+> f590ffff 	pldw	\[r0, #4095\]	; 0xfff
-0[0-9a-f]+ <[^>]+> f510ffff 	pldw	\[r0, #-4095\]	; 0xfff
+0[0-9a-f]+ <[^>]+> f510ffff 	pldw	\[r0, #-4095\]	; 0xfffff001
 0[0-9a-f]+ <[^>]+> f790f000 	pldw	\[r0, r0\]
 0[0-9a-f]+ <[^>]+> f791f000 	pldw	\[r1, r0\]
 0[0-9a-f]+ <[^>]+> f79ef000 	pldw	\[lr, r0\]
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index dfea7d366b4..a9581ae457d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2014-08-21  Nathan Sidwell  <nathan@codesourcery.com>
+	    Maciej W. Rozycki  <macro@codesourcery.com>
+
+	* arm-dis.c (print_arm_address): Negate the GPR-relative offset
+	returned if the U bit is set.
+
 2014-08-21  Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index f43ce0df209..8f399fbfafe 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2583,6 +2583,8 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
 	      arm_decode_shift (given, func, stream, TRUE);
 	    }
 	}
+      if (NEGATIVE_BIT_SET)
+	offset = -offset;
     }
 
   return (signed long) offset;