From: Greg Kroah-Hartman Date: Sat, 11 Apr 2026 12:18:32 +0000 (+0200) Subject: Linux 6.1.168 X-Git-Tag: v6.1.168^0 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=84dd812c0ce9e9470bac5881a0c8de2a08573133;p=thirdparty%2Fkernel%2Fstable-queue.git Linux 6.1.168 --- diff --git a/queue-6.12/drm-amd-display-disable-scaling-on-dce6-for-now.patch b/queue-6.12/drm-amd-display-disable-scaling-on-dce6-for-now.patch index 5d17d7064e..d251bf3952 100644 --- a/queue-6.12/drm-amd-display-disable-scaling-on-dce6-for-now.patch +++ b/queue-6.12/drm-amd-display-disable-scaling-on-dce6-for-now.patch @@ -29,7 +29,7 @@ Signed-off-by: Greg Kroah-Hartman --- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c -@@ -404,13 +404,13 @@ static const struct dc_plane_cap plane_c +@@ -403,13 +403,13 @@ static const struct dc_plane_cap plane_c }, .max_upscale_factor = { diff --git a/queue-6.12/drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch b/queue-6.12/drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch index 3132cfa030..9d77915898 100644 --- a/queue-6.12/drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch +++ b/queue-6.12/drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch @@ -50,7 +50,7 @@ Signed-off-by: Greg Kroah-Hartman --- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c -@@ -374,7 +374,7 @@ static const struct resource_caps res_ca +@@ -373,7 +373,7 @@ static const struct resource_caps res_ca .num_timing_generator = 6, .num_audio = 6, .num_stream_encoder = 6, @@ -59,7 +59,7 @@ Signed-off-by: Greg Kroah-Hartman .num_ddc = 6, }; -@@ -390,7 +390,7 @@ static const struct resource_caps res_ca +@@ -389,7 +389,7 @@ static const struct resource_caps res_ca .num_timing_generator = 2, .num_audio = 2, .num_stream_encoder = 2, @@ -68,7 +68,7 @@ Signed-off-by: Greg Kroah-Hartman .num_ddc = 2, }; -@@ -990,21 +990,24 @@ static bool dce60_construct( +@@ -982,21 +982,24 @@ static bool dce60_construct( if (bp->fw_info_valid && bp->fw_info.external_clock_source_frequency_for_dp != 0) { pool->base.dp_clock_source = @@ -99,7 +99,7 @@ Signed-off-by: Greg Kroah-Hartman } if (pool->base.dp_clock_source == NULL) { -@@ -1382,21 +1385,24 @@ static bool dce64_construct( +@@ -1374,21 +1377,24 @@ static bool dce64_construct( if (bp->fw_info_valid && bp->fw_info.external_clock_source_frequency_for_dp != 0) { pool->base.dp_clock_source = diff --git a/queue-6.12/drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch b/queue-6.12/drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch index 8454019917..31556c711f 100644 --- a/queue-6.12/drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch +++ b/queue-6.12/drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch @@ -43,7 +43,7 @@ Signed-off-by: Greg Kroah-Hartman --- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c -@@ -889,7 +889,16 @@ static bool dce60_validate_bandwidth( +@@ -881,7 +881,16 @@ static bool dce60_validate_bandwidth( context->bw_ctx.bw.dce.dispclk_khz = 681000; context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; } else { diff --git a/queue-6.12/drm-amd-display-reject-modes-with-too-high-pixel-clock-on-dce6-10.patch b/queue-6.12/drm-amd-display-reject-modes-with-too-high-pixel-clock-on-dce6-10.patch deleted file mode 100644 index acfdc9c13f..0000000000 --- a/queue-6.12/drm-amd-display-reject-modes-with-too-high-pixel-clock-on-dce6-10.patch +++ /dev/null @@ -1,158 +0,0 @@ -From stable+bounces-232623-greg=kroah.com@vger.kernel.org Wed Apr 1 02:43:45 2026 -From: Rosen Penev -Date: Tue, 31 Mar 2026 17:39:02 -0700 -Subject: drm/amd/display: Reject modes with too high pixel clock on DCE6-10 -To: stable@vger.kernel.org -Cc: "Alex Deucher" , "Christian König" , "Xinhui Pan" , "David Airlie" , "Simona Vetter" , "Harry Wentland" , "Leo Li" , "Rodrigo Siqueira" , "Ray Wu" , "Wayne Lin" , "Mario Limonciello" , "Roman Li" , "Eric Yang" , "Tony Cheng" , "Mauro Rossi" , "Timur Kristóf" , "Alex Hung" , amd-gfx@lists.freedesktop.org (open list:RADEON and AMDGPU DRM DRIVERS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS), linux-kernel@vger.kernel.org (open list) -Message-ID: <20260401003908.3438-5-rosenp@gmail.com> - -From: Timur Kristóf - -[ Upstream commit 118800b0797a046adaa2a8e9dee9b971b78802a7 ] - -Reject modes with a pixel clock higher than the maximum display -clock. Use 400 MHz as a fallback value when the maximum display -clock is not known. Pixel clocks that are higher than the display -clock just won't work and are not supported. - -With the addition of the YUV422 fallback, DC can now accidentally -select a mode requiring higher pixel clock than actually supported -when the DP version supports the required bandwidth but the clock -is otherwise too high for the display engine. DCE 6-10 don't -support these modes but they don't have a bandwidth calculation -to reject them properly. - -Fixes: db291ed1732e ("drm/amd/display: Add fallback path for YCBCR422") -Reviewed-by: Alex Deucher -Signed-off-by: Timur Kristóf -Signed-off-by: Mario Limonciello -Signed-off-by: Alex Deucher -Signed-off-by: Rosen Penev -Signed-off-by: Greg Kroah-Hartman ---- - drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 3 +++ - drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/dce60_clk_mgr.c | 5 +++++ - drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c | 10 +++++++++- - drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c | 10 +++++++++- - drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c | 10 +++++++++- - 5 files changed, 35 insertions(+), 3 deletions(-) - ---- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c -+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c -@@ -460,6 +460,9 @@ void dce_clk_mgr_construct( - clk_mgr->max_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; - clk_mgr->cur_min_clks_state = DM_PP_CLOCKS_STATE_INVALID; - -+ base->clks.max_supported_dispclk_khz = -+ clk_mgr->max_clks_by_state[DM_PP_CLOCKS_STATE_PERFORMANCE].display_clk_khz; -+ - dce_clock_read_integrated_info(clk_mgr); - dce_clock_read_ss_info(clk_mgr); - } ---- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/dce60_clk_mgr.c -+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/dce60_clk_mgr.c -@@ -147,6 +147,8 @@ void dce60_clk_mgr_construct( - struct dc_context *ctx, - struct clk_mgr_internal *clk_mgr) - { -+ struct clk_mgr *base = &clk_mgr->base; -+ - dce_clk_mgr_construct(ctx, clk_mgr); - - memcpy(clk_mgr->max_clks_by_state, -@@ -157,5 +159,8 @@ void dce60_clk_mgr_construct( - clk_mgr->clk_mgr_shift = &disp_clk_shift; - clk_mgr->clk_mgr_mask = &disp_clk_mask; - clk_mgr->base.funcs = &dce60_funcs; -+ -+ base->clks.max_supported_dispclk_khz = -+ clk_mgr->max_clks_by_state[DM_PP_CLOCKS_STATE_PERFORMANCE].display_clk_khz; - } - ---- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c -@@ -34,6 +34,7 @@ - #include "stream_encoder.h" - - #include "resource.h" -+#include "clk_mgr.h" - #include "include/irq_service_interface.h" - #include "irq/dce60/irq_service_dce60.h" - #include "dce110/dce110_timing_generator.h" -@@ -870,10 +871,17 @@ static bool dce60_validate_bandwidth( - { - int i; - bool at_least_one_pipe = false; -+ struct dc_stream_state *stream = NULL; -+ const uint32_t max_pix_clk_khz = max(dc->clk_mgr->clks.max_supported_dispclk_khz, 400000); - - for (i = 0; i < dc->res_pool->pipe_count; i++) { -- if (context->res_ctx.pipe_ctx[i].stream) -+ stream = context->res_ctx.pipe_ctx[i].stream; -+ if (stream) { - at_least_one_pipe = true; -+ -+ if (stream->timing.pix_clk_100hz >= max_pix_clk_khz * 10) -+ return DC_FAIL_BANDWIDTH_VALIDATE; -+ } - } - - if (at_least_one_pipe) { ---- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c -@@ -29,6 +29,7 @@ - #include "stream_encoder.h" - - #include "resource.h" -+#include "clk_mgr.h" - #include "include/irq_service_interface.h" - #include "virtual/virtual_stream_encoder.h" - #include "dce110/dce110_resource.h" -@@ -843,10 +844,17 @@ static bool dce100_validate_bandwidth( - { - int i; - bool at_least_one_pipe = false; -+ struct dc_stream_state *stream = NULL; -+ const uint32_t max_pix_clk_khz = max(dc->clk_mgr->clks.max_supported_dispclk_khz, 400000); - - for (i = 0; i < dc->res_pool->pipe_count; i++) { -- if (context->res_ctx.pipe_ctx[i].stream) -+ stream = context->res_ctx.pipe_ctx[i].stream; -+ if (stream) { - at_least_one_pipe = true; -+ -+ if (stream->timing.pix_clk_100hz >= max_pix_clk_khz * 10) -+ return DC_FAIL_BANDWIDTH_VALIDATE; -+ } - } - - if (at_least_one_pipe) { ---- a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c -+++ b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c -@@ -32,6 +32,7 @@ - #include "stream_encoder.h" - - #include "resource.h" -+#include "clk_mgr.h" - #include "include/irq_service_interface.h" - #include "irq/dce80/irq_service_dce80.h" - #include "dce110/dce110_timing_generator.h" -@@ -876,10 +877,17 @@ static bool dce80_validate_bandwidth( - { - int i; - bool at_least_one_pipe = false; -+ struct dc_stream_state *stream = NULL; -+ const uint32_t max_pix_clk_khz = max(dc->clk_mgr->clks.max_supported_dispclk_khz, 400000); - - for (i = 0; i < dc->res_pool->pipe_count; i++) { -- if (context->res_ctx.pipe_ctx[i].stream) -+ stream = context->res_ctx.pipe_ctx[i].stream; -+ if (stream) { - at_least_one_pipe = true; -+ -+ if (stream->timing.pix_clk_100hz >= max_pix_clk_khz * 10) -+ return DC_FAIL_BANDWIDTH_VALIDATE; -+ } - } - - if (at_least_one_pipe) { diff --git a/queue-6.12/series b/queue-6.12/series index c4911cf2b0..db8018ca49 100644 --- a/queue-6.12/series +++ b/queue-6.12/series @@ -226,7 +226,6 @@ x86-cpu-amd-add-additional-fixed-rdseed-microcode-revisions.patch drm-amd-amdgpu-decouple-aspm-with-pcie-dpm.patch drm-amd-amdgpu-disable-aspm-in-some-situations.patch drm-amd-display-disable-fastboot-on-dce-6-too.patch -drm-amd-display-reject-modes-with-too-high-pixel-clock-on-dce6-10.patch drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch drm-amd-display-adjust-dce-8-10-clock-don-t-overclock-by-15.patch diff --git a/queue-6.1/acpi-ec-clean-up-handlers-on-probe-failure-in-acpi_e.patch b/releases/6.1.168/acpi-ec-clean-up-handlers-on-probe-failure-in-acpi_e.patch similarity index 100% rename from queue-6.1/acpi-ec-clean-up-handlers-on-probe-failure-in-acpi_e.patch rename to releases/6.1.168/acpi-ec-clean-up-handlers-on-probe-failure-in-acpi_e.patch diff --git a/queue-6.1/acpi-ec-evaluate-orphan-_reg-under-ec-device.patch b/releases/6.1.168/acpi-ec-evaluate-orphan-_reg-under-ec-device.patch similarity index 100% rename from queue-6.1/acpi-ec-evaluate-orphan-_reg-under-ec-device.patch rename to releases/6.1.168/acpi-ec-evaluate-orphan-_reg-under-ec-device.patch diff --git a/queue-6.1/acpi-ec-fix-ec-address-space-handler-unregistration.patch b/releases/6.1.168/acpi-ec-fix-ec-address-space-handler-unregistration.patch similarity index 100% rename from queue-6.1/acpi-ec-fix-ec-address-space-handler-unregistration.patch rename to releases/6.1.168/acpi-ec-fix-ec-address-space-handler-unregistration.patch diff --git a/queue-6.1/acpi-ec-fix-ecdt-probe-ordering-issues.patch b/releases/6.1.168/acpi-ec-fix-ecdt-probe-ordering-issues.patch similarity index 100% rename from queue-6.1/acpi-ec-fix-ecdt-probe-ordering-issues.patch rename to releases/6.1.168/acpi-ec-fix-ecdt-probe-ordering-issues.patch diff --git a/queue-6.1/acpi-ec-install-address-space-handler-at-the-namespa.patch b/releases/6.1.168/acpi-ec-install-address-space-handler-at-the-namespa.patch similarity index 100% rename from queue-6.1/acpi-ec-install-address-space-handler-at-the-namespa.patch rename to releases/6.1.168/acpi-ec-install-address-space-handler-at-the-namespa.patch diff --git a/queue-6.1/acpica-allow-address_space_handler-install-and-_reg-.patch b/releases/6.1.168/acpica-allow-address_space_handler-install-and-_reg-.patch similarity index 100% rename from queue-6.1/acpica-allow-address_space_handler-install-and-_reg-.patch rename to releases/6.1.168/acpica-allow-address_space_handler-install-and-_reg-.patch diff --git a/queue-6.1/acpica-include-acpi-acpixf.h-fix-indentation.patch b/releases/6.1.168/acpica-include-acpi-acpixf.h-fix-indentation.patch similarity index 100% rename from queue-6.1/acpica-include-acpi-acpixf.h-fix-indentation.patch rename to releases/6.1.168/acpica-include-acpi-acpixf.h-fix-indentation.patch diff --git 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