From: Jianwei Zheng Date: Tue, 5 May 2026 17:04:10 +0000 (+0200) Subject: phy: rockchip: inno-usb2: Add support for RK3528 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=864b3617df827865a95a06f06f09a8d57a795b91;p=thirdparty%2Fkernel%2Flinux.git phy: rockchip: inno-usb2: Add support for RK3528 The RK3528 has a single USB2PHY with a otg and host port. Add support for the RK3528 variant of USB2PHY. PHY tuning for RK3528: - Turn off differential receiver in suspend mode to save power consumption. - Set HS eye-height to 400mV instead of default 450mV. - Choose the Tx fs/ls data as linestate from TX driver for otg port which uses dwc3 controller to improve fs/ls devices compatibility with long cables. Undocumented magic-values are based on the linux-stan-6.1-rkr5 tag of the vendor-kernel. Signed-off-by: Jianwei Zheng Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner Reviewed-by: Neil Armstrong Link: https://patch.msgid.link/20260505170410.3265305-6-heiko@sntech.de Signed-off-by: Vinod Koul --- diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index d8879fcd42919..133cfd6624e82 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -1511,6 +1511,38 @@ static int rk3128_usb2phy_tuning(struct rockchip_usb2phy *rphy) BIT(2) << BIT_WRITEABLE_SHIFT | 0); } +static int rk3528_usb2phy_tuning(struct rockchip_usb2phy *rphy) +{ + int ret; + + /* Turn off otg port differential receiver in suspend mode */ + ret = regmap_write(rphy->phy_base, 0x30, BIT(18) | 0x0000); + if (ret) + return ret; + + /* Turn off host port differential receiver in suspend mode */ + ret = regmap_write(rphy->phy_base, 0x430, BIT(18) | 0x0000); + if (ret) + return ret; + + /* Set otg port HS eye height to 400mv (default is 450mv) */ + ret = regmap_write(rphy->phy_base, 0x30, GENMASK(22, 20) | 0x0000); + if (ret) + return ret; + + /* Set host port HS eye height to 400mv (default is 450mv) */ + ret = regmap_write(rphy->phy_base, 0x430, GENMASK(22, 20) | 0x0000); + if (ret) + return ret; + + /* Choose the Tx fs/ls data as linestate from TX driver for otg port */ + ret = regmap_write(rphy->phy_base, 0x94, GENMASK(22, 19) | 0x0018); + if (ret) + return ret; + + return 0; +} + static int rk3576_usb2phy_tuning(struct rockchip_usb2phy *rphy) { int ret; @@ -1924,6 +1956,57 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = { { /* sentinel */ } }; +static const struct rockchip_usb2phy_cfg rk3528_phy_cfgs[] = { + { + .reg = 0xffdf0000, + .num_ports = 2, + .phy_tuning = rk3528_usb2phy_tuning, + .clkout_ctl_phy = { 0x041c, 7, 2, 0, 0x27 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x004c, 8, 0, 0, 0x1d1 }, + .bvalid_det_en = { 0x0074, 3, 2, 0, 3 }, + .bvalid_det_st = { 0x0078, 3, 2, 0, 3 }, + .bvalid_det_clr = { 0x007c, 3, 2, 0, 3 }, + .idfall_det_en = { 0x0074, 5, 5, 0, 1 }, + .idfall_det_st = { 0x0078, 5, 5, 0, 1 }, + .idfall_det_clr = { 0x007c, 5, 5, 0, 1 }, + .idrise_det_en = { 0x0074, 4, 4, 0, 1 }, + .idrise_det_st = { 0x0078, 4, 4, 0, 1 }, + .idrise_det_clr = { 0x007c, 4, 4, 0, 1 }, + .ls_det_en = { 0x0074, 0, 0, 0, 1 }, + .ls_det_st = { 0x0078, 0, 0, 0, 1 }, + .ls_det_clr = { 0x007c, 0, 0, 0, 1 }, + .utmi_avalid = { 0x006c, 1, 1, 0, 1 }, + .utmi_bvalid = { 0x006c, 0, 0, 0, 1 }, + .utmi_id = { 0x006c, 6, 6, 0, 1 }, + .utmi_ls = { 0x006c, 5, 4, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x005c, 8, 0, 0x1d2, 0x1d1 }, + .ls_det_en = { 0x0090, 0, 0, 0, 1 }, + .ls_det_st = { 0x0094, 0, 0, 0, 1 }, + .ls_det_clr = { 0x0098, 0, 0, 0, 1 }, + .utmi_ls = { 0x006c, 13, 12, 0, 1 }, + .utmi_hstdet = { 0x006c, 15, 15, 0, 1 }, + } + }, + .chg_det = { + .opmode = { 0x004c, 3, 0, 5, 1 }, + .cp_det = { 0x006c, 19, 19, 0, 1 }, + .dcp_det = { 0x006c, 18, 18, 0, 1 }, + .dp_det = { 0x006c, 20, 20, 0, 1 }, + .idm_sink_en = { 0x0058, 1, 1, 0, 1 }, + .idp_sink_en = { 0x0058, 0, 0, 0, 1 }, + .idp_src_en = { 0x0058, 2, 2, 0, 1 }, + .rdm_pdwn_en = { 0x0058, 3, 3, 0, 1 }, + .vdm_src_en = { 0x0058, 5, 5, 0, 1 }, + .vdp_src_en = { 0x0058, 4, 4, 0, 1 }, + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rk3562_phy_cfgs[] = { { .reg = 0xff740000, @@ -2291,6 +2374,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = { { .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs }, { .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs }, { .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs }, + { .compatible = "rockchip,rk3528-usb2phy", .data = &rk3528_phy_cfgs }, { .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs }, { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs }, { .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },