From: Jakub Jelinek <jakub@redhat.com>
Date: Tue, 18 Feb 2014 07:32:17 +0000 (+0100)
Subject: re PR driver/60233 (AVX instructions emitted with -march=native on host without AVX... 
X-Git-Tag: releases/gcc-4.7.4~244
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=873652368e7940e2dab63acaeb5982a002d179a6;p=thirdparty%2Fgcc.git

re PR driver/60233 (AVX instructions emitted with -march=native on host without AVX support)

	PR driver/60233
	* config/i386/driver-i386.c (host_detect_local_cpu): If
	YMM state is not saved by the OS, also clear has_f16c.  Move
	CPUID 0x80000001 handling before YMM state saving checking.

Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>

From-SVN: r207835
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c341f3840692..125ea218b9e7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2014-02-18  Jakub Jelinek  <jakub@redhat.com>
+	    Uros Bizjak  <ubizjak@gmail.com>
+
+	PR driver/60233
+	* config/i386/driver-i386.c (host_detect_local_cpu): If
+	YMM state is not saved by the OS, also clear has_f16c.  Move
+	CPUID 0x80000001 handling before YMM state saving checking.
+
 2014-02-13  Uros Bizjak  <ubizjak@gmail.com>
 
 	Backport from mainline
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 57f951527ea9..c7151eb30585 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -469,27 +469,6 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       has_fsgsbase = ebx & bit_FSGSBASE;
     }
 
-  /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv.  */
-#define XCR_XFEATURE_ENABLED_MASK	0x0
-#define XSTATE_FP			0x1
-#define XSTATE_SSE			0x2
-#define XSTATE_YMM			0x4
-  if (has_osxsave)
-    asm (".byte 0x0f; .byte 0x01; .byte 0xd0"
-	 : "=a" (eax), "=d" (edx)
-	 : "c" (XCR_XFEATURE_ENABLED_MASK));
-
-  /* Check if SSE and YMM states are supported.  */
-  if (!has_osxsave
-      || (eax & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM))
-    {
-      has_avx = 0;
-      has_avx2 = 0;
-      has_fma = 0;
-      has_fma4 = 0;
-      has_xop = 0;
-    }
-
   /* Check cpuid level of extended features.  */
   __cpuid (0x80000000, ext_level, ebx, ecx, edx);
 
@@ -511,6 +490,28 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       has_3dnow = edx & bit_3DNOW;
     }
 
+  /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv.  */
+#define XCR_XFEATURE_ENABLED_MASK	0x0
+#define XSTATE_FP			0x1
+#define XSTATE_SSE			0x2
+#define XSTATE_YMM			0x4
+  if (has_osxsave)
+    asm (".byte 0x0f; .byte 0x01; .byte 0xd0"
+	 : "=a" (eax), "=d" (edx)
+	 : "c" (XCR_XFEATURE_ENABLED_MASK));
+
+  /* Check if SSE and YMM states are supported.  */
+  if (!has_osxsave
+      || (eax & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM))
+    {
+      has_avx = 0;
+      has_avx2 = 0;
+      has_fma = 0;
+      has_fma4 = 0;
+      has_f16c = 0;
+      has_xop = 0;
+    }
+
   if (!arch)
     {
       if (vendor == SIG_AMD