From: Hugo Villeneuve Date: Fri, 17 Apr 2026 14:53:34 +0000 (-0400) Subject: serial: max310x: use FIELD_PREP macro to set PLL bitfields X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=877c2556adb7758ada3af8a1e87a217ed21c6ef4;p=thirdparty%2Fkernel%2Fstable.git serial: max310x: use FIELD_PREP macro to set PLL bitfields Use FIELD_PREP macros to improve code readability. Signed-off-by: Hugo Villeneuve Link: https://patch.msgid.link/20260417-max310x-2-v1-7-b424e105ecac@dimonoff.com Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index 7ab5e4bd87ee..b4449b68cfee 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c @@ -9,6 +9,7 @@ * Based on max3107.c, by Aavamobile */ +#include #include #include #include @@ -621,7 +622,9 @@ static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s, u8 pll_id = max310x_pll_mult_to_id(cfg.pll_mult); clksrc |= MAX310X_CLKSRC_PLL_BIT; - regmap_write(s->regmap, MAX310X_PLLCFG_REG, (pll_id << 6) | cfg.prediv); + val = FIELD_PREP(MAX310X_PLLCFG_PLLFACTOR_MASK, pll_id) | + FIELD_PREP(MAX310X_PLLCFG_PREDIV_MASK, cfg.prediv); + regmap_write(s->regmap, MAX310X_PLLCFG_REG, val); } else clksrc |= MAX310X_CLKSRC_PLLBYP_BIT;