From: Zhen Lei <thunder.leizhen@huawei.com>
Date: Mon, 12 Oct 2020 06:12:24 +0000 (+0800)
Subject: dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml
X-Git-Tag: v5.10-rc1~133^2~5
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=879baf11777cdfa5a04c266c7a987907887c7443;p=thirdparty%2Fkernel%2Flinux.git

dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml

Add properties: #reset-cells, #address-cells, #size-cells and ranges. Due
to the Hisilicon system controller node may contains child nodes, change
the value of "additionalProperties" from "false" to "type: object". The
examples have also been updated.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20201012061225.1597-10-thunder.leizhen@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
---

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
index 449140f89ddbc..5a53d433b6f08 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
@@ -71,21 +71,43 @@ properties:
   '#clock-cells':
     const: 1
 
+  '#reset-cells':
+    const: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+  ranges: true
+
 required:
   - compatible
   - reg
 
-additionalProperties: false
+additionalProperties:
+  type: object
 
 examples:
   - |
     /* Hisilicon system controller */
-    system-controller@fc802000 {
+    system-controller@802000 {
         compatible = "hisilicon,sysctrl", "syscon";
-        reg = <0xfc802000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x802000 0x1000>;
+        reg = <0x802000 0x1000>;
+
         smp-offset = <0x31c>;
         resume-offset = <0x308>;
         reboot-offset = <0x4>;
+
+        clock: clock@0 {
+            compatible = "hisilicon,hi3620-clock";
+            reg = <0 0x10000>;
+            #clock-cells = <1>;
+        };
     };
 
     /* HiP01 system controller */