From: Kwok Cheung Yeung <kcy@codesourcery.com>
Date: Tue, 27 Sep 2022 21:30:11 +0000 (+0000)
Subject: amdgcn: Add builtin for vectorized DFmode fabs operation
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=87caae2e83f7a8c2c9bf0ba996bc75220e54fadf;p=thirdparty%2Fgcc.git

amdgcn: Add builtin for vectorized DFmode fabs operation

2022-09-27  Kwok Cheung Yeung  <kcy@codesourcery.com>

	gcc/
	* config/gcn/gcn-builtins.def (FABSV): New builtin.
	* config/gcn/gcn.cc (gcn_expand_builtin_1): Generate
	builtin for GCN_BUILTIN_FABSV.
---

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index 39e094476c9a..9933325bf20a 100644
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,9 @@
+2022-09-27  Kwok Cheung Yeung  <kcy@codesourcery.com>
+
+	* config/gcn/gcn-builtins.def (FABSV): New builtin.
+	* config/gcn/gcn.cc (gcn_expand_builtin_1): Generate
+	builtin for GCN_BUILTIN_FABSV.
+
 2022-09-27  Kwok Cheung Yeung  <kcy@codesourcery.com>
 
 	* config/gcn/gcn-valu.md (math_unop_insn): New attribute.
diff --git a/gcc/config/gcn/gcn-builtins.def b/gcc/config/gcn/gcn-builtins.def
index 27691909925b..21e3f0131e4f 100644
--- a/gcc/config/gcn/gcn-builtins.def
+++ b/gcc/config/gcn/gcn-builtins.def
@@ -64,6 +64,11 @@ DEF_BUILTIN (FABSVF, 3 /*CODE_FOR_fabsvf */,
 	     _A2 (GCN_BTI_V64SF, GCN_BTI_V64SF),
 	     gcn_expand_builtin_1)
 
+DEF_BUILTIN (FABSV, 3 /*CODE_FOR_fabsv */,
+	     "fabsv", B_INSN,
+	     _A2 (GCN_BTI_V64DF, GCN_BTI_V64DF),
+	     gcn_expand_builtin_1)
+
 DEF_BUILTIN (LDEXPVF, 3 /*CODE_FOR_ldexpvf */,
 	     "ldexpvf", B_INSN,
 	     _A3 (GCN_BTI_V64SF, GCN_BTI_V64SF, GCN_BTI_V64SI),
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index ac8784a9a3dd..a3f21abc391f 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -4032,6 +4032,19 @@ gcn_expand_builtin_1 (tree exp, rtx target, rtx /*subtarget */ ,
 		   (target, arg, gcn_gen_undef (V64SFmode), exec));
 	return target;
       }
+    case GCN_BUILTIN_FABSV:
+      {
+	if (ignore)
+	  return target;
+	rtx exec = gcn_full_exec_reg ();
+	rtx arg = force_reg (V64DFmode,
+			     expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX,
+					  V64DFmode,
+					  EXPAND_NORMAL));
+	emit_insn (gen_absv64df2_exec
+		   (target, arg, gcn_gen_undef (V64DFmode), exec));
+	return target;
+      }
     case GCN_BUILTIN_LDEXPVF:
       {
 	if (ignore)