From: Dmitry Baryshkov Date: Sun, 21 Sep 2025 07:09:18 +0000 (+0300) Subject: arm64: dts: qcom: lemans: move USB PHYs to a proper place X-Git-Tag: v6.19-rc1~100^2~14^2~120 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=883e20433fe586a6d3e1332d25f5e675921fefd9;p=thirdparty%2Flinux.git arm64: dts: qcom: lemans: move USB PHYs to a proper place Sort the lemans.dtsi, moving USB1 and USB2 PHYs to a proper place, making the DT file sorted by the address. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250921-refgen-v1-2-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi index c2d2200d845b3..5fb083a19918c 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -3901,6 +3901,32 @@ status = "disabled"; }; + usb_1_hsphy: phy@88e6000 { + compatible = "qcom,sa8775p-usb-hs-phy", + "qcom,usb-snps-hs-5nm-phy"; + reg = <0 0x088e6000 0 0x120>; + clocks = <&gcc GCC_USB_CLKREF_EN>; + clock-names = "ref"; + resets = <&gcc GCC_USB2_PHY_SEC_BCR>; + + #phy-cells = <0>; + + status = "disabled"; + }; + + usb_2_hsphy: phy@88e7000 { + compatible = "qcom,sa8775p-usb-hs-phy", + "qcom,usb-snps-hs-5nm-phy"; + reg = <0 0x088e7000 0 0x120>; + clocks = <&gcc GCC_USB_CLKREF_EN>; + clock-names = "ref"; + resets = <&gcc GCC_USB3_PHY_TERT_BCR>; + + #phy-cells = <0>; + + status = "disabled"; + }; + usb_0_qmpphy: phy@88e8000 { compatible = "qcom,sa8775p-qmp-usb3-uni-phy"; reg = <0 0x088e8000 0 0x2000>; @@ -3925,6 +3951,30 @@ status = "disabled"; }; + usb_1_qmpphy: phy@88ea000 { + compatible = "qcom,sa8775p-qmp-usb3-uni-phy"; + reg = <0 0x088ea000 0 0x2000>; + + clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, + <&gcc GCC_USB_CLKREF_EN>, + <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "pipe"; + + resets = <&gcc GCC_USB3_PHY_SEC_BCR>, + <&gcc GCC_USB3PHY_PHY_SEC_BCR>; + reset-names = "phy", "phy_phy"; + + power-domains = <&gcc USB30_SEC_GDSC>; + + #clock-cells = <0>; + clock-output-names = "usb3_sec_phy_pipe_clk_src"; + + #phy-cells = <0>; + + status = "disabled"; + }; + usb_0: usb@a600000 { compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3"; reg = <0 0x0a600000 0 0xfc100>; @@ -3973,43 +4023,6 @@ status = "disabled"; }; - usb_1_hsphy: phy@88e6000 { - compatible = "qcom,sa8775p-usb-hs-phy", - "qcom,usb-snps-hs-5nm-phy"; - reg = <0 0x088e6000 0 0x120>; - clocks = <&gcc GCC_USB_CLKREF_EN>; - clock-names = "ref"; - resets = <&gcc GCC_USB2_PHY_SEC_BCR>; - - #phy-cells = <0>; - - status = "disabled"; - }; - - usb_1_qmpphy: phy@88ea000 { - compatible = "qcom,sa8775p-qmp-usb3-uni-phy"; - reg = <0 0x088ea000 0 0x2000>; - - clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, - <&gcc GCC_USB_CLKREF_EN>, - <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; - clock-names = "aux", "ref", "com_aux", "pipe"; - - resets = <&gcc GCC_USB3_PHY_SEC_BCR>, - <&gcc GCC_USB3PHY_PHY_SEC_BCR>; - reset-names = "phy", "phy_phy"; - - power-domains = <&gcc USB30_SEC_GDSC>; - - #clock-cells = <0>; - clock-output-names = "usb3_sec_phy_pipe_clk_src"; - - #phy-cells = <0>; - - status = "disabled"; - }; - usb_1: usb@a800000 { compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3"; reg = <0 0x0a800000 0 0xfc100>; @@ -4058,19 +4071,6 @@ status = "disabled"; }; - usb_2_hsphy: phy@88e7000 { - compatible = "qcom,sa8775p-usb-hs-phy", - "qcom,usb-snps-hs-5nm-phy"; - reg = <0 0x088e7000 0 0x120>; - clocks = <&gcc GCC_USB_CLKREF_EN>; - clock-names = "ref"; - resets = <&gcc GCC_USB3_PHY_TERT_BCR>; - - #phy-cells = <0>; - - status = "disabled"; - }; - usb_2: usb@a400000 { compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3"; reg = <0 0x0a400000 0 0xfc100>;