From: Cosmin Tanislav Date: Wed, 19 Nov 2025 16:14:26 +0000 (+0200) Subject: spi: rzv2h-rspi: avoid recomputing transfer frequency X-Git-Tag: v6.19-rc1~150^2~6^2~6 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=88782493204512fcf4e020e2385bca3e3c5bd4c0;p=thirdparty%2Fkernel%2Flinux.git spi: rzv2h-rspi: avoid recomputing transfer frequency Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a more complicated algorithm for calculating the optimal SPI transfer frequency compared to RZ/V2H, as the clock from which the SPI frequency is generated supports multiple dividers. Cache the requested transfer frequency and skip calling rzv2h_rspi_setup_clock() if it matches the last used one to prepare for adding support for variable clock frequency handling. Signed-off-by: Cosmin Tanislav Link: https://patch.msgid.link/20251119161434.595677-6-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-rzv2h-rspi.c b/drivers/spi/spi-rzv2h-rspi.c index f02f25b98ec61..d7719f3c7b134 100644 --- a/drivers/spi/spi-rzv2h-rspi.c +++ b/drivers/spi/spi-rzv2h-rspi.c @@ -81,6 +81,7 @@ struct rzv2h_rspi_priv { struct clk *tclk; wait_queue_head_t wait; unsigned int bytes_per_word; + u32 last_speed_hz; u32 freq; u16 status; u8 spr; @@ -298,9 +299,13 @@ static int rzv2h_rspi_prepare_message(struct spi_controller *ctlr, rspi->bytes_per_word = roundup_pow_of_two(BITS_TO_BYTES(bits_per_word)); - rspi->freq = rzv2h_rspi_setup_clock(rspi, speed_hz); - if (!rspi->freq) - return -EINVAL; + if (speed_hz != rspi->last_speed_hz) { + rspi->freq = rzv2h_rspi_setup_clock(rspi, speed_hz); + if (!rspi->freq) + return -EINVAL; + + rspi->last_speed_hz = speed_hz; + } writeb(rspi->spr, rspi->base + RSPI_SPBR);