From: Bartosz Golaszewski Date: Mon, 7 Oct 2024 10:02:55 +0000 (+0200) Subject: arm64: dts: qcom: sm8650: extend the register range for UFS ICE X-Git-Tag: v6.13-rc1~140^2~22^2~57 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=88dfd0b5a199c6ce4350104bddb40f3ba488e342;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: qcom: sm8650: extend the register range for UFS ICE The full register range for ICE on sm8650 is 0x18000 so update the crypto node. Reviewed-by: Om Prakash Singh Tested-by: Neil Armstrong Signed-off-by: Gaurav Kashyap Co-developed-by: Gaurav Kashyap Reviewed-by: Konrad Dybcio Reviewed-by: Neil Armstrong Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20241007-wrapped-keys-dts-v8-1-05ee041f2fc1@linaro.org Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 173e092b15e2f..3d8a807a81c9c 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2595,7 +2595,7 @@ ice: crypto@1d88000 { compatible = "qcom,sm8650-inline-crypto-engine", "qcom,inline-crypto-engine"; - reg = <0 0x01d88000 0 0x8000>; + reg = <0 0x01d88000 0 0x18000>; clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; };