From: Michael Walle <mwalle@kernel.org>
Date: Tue, 20 May 2025 07:44:39 +0000 (+0200)
Subject: drm/panel-simple: add AUO P238HAN01 panel entry
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8a45632ed3179995b2956cfbf140655701301471;p=thirdparty%2Flinux.git

drm/panel-simple: add AUO P238HAN01 panel entry

Timings taken from the datasheet and the display is working in DE mode,
thus the datasheet only specifies the blanking period. sync, back porch
and front porch are arbitrarily chosen.

The datasheet can be found at [1] but for reference these are the
relevant timings:

 sym  |              | min  | typ  | max  | unit |
------|--------------+------+------+------+------+
   Tv | V period     | 1094 | 1130 | 1836 | Th   |
      | V active     | 1080 | 1080 | 1080 | Th   |
      | V blanking   |   14 |   50 |  756 | Th   |
   Fv | V frequency  |   49 |   60 |   76 | Hz   |
   Th | H period     | 1000 | 1050 | 1678 | Tclk |
      | H active     |  960 |  960 |  960 | Tclk |
      | H blanking   |   40 |   90 |  718 | Tclk |
   Fh | H frequency  | 53.7 | 67.8 | 90.0 | kHz  |
 Tclk | LVDS clock   | 53.7 | 71.2 | 90.0 | MHz  |

Keep in mind that this is a dual link LVDS panel and the horizontal
timings are only for one half of the panel.

[1] https://www.fortec-integrated.de/fileadmin/pdf/produkte/TFT-Displays/AUO/P238HAN01.0_Datasheet.pdf

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250520074439.655749-2-mwalle@kernel.org
---

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 82ee2f12b8d29..ccbfa4689b653 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1268,6 +1268,30 @@ static const struct panel_desc auo_g190ean01 = {
 	.connector_type = DRM_MODE_CONNECTOR_LVDS,
 };
 
+static const struct display_timing auo_p238han01_timings = {
+	.pixelclock = { 107400000, 142400000, 180000000 },
+	.hactive = { 1920, 1920, 1920 },
+	.hfront_porch = { 30, 70, 650 },
+	.hback_porch = { 30, 70, 650 },
+	.hsync_len = { 20, 40, 136 },
+	.vactive = { 1080, 1080, 1080 },
+	.vfront_porch = { 5, 19, 318 },
+	.vback_porch = { 5, 19, 318 },
+	.vsync_len = { 4, 12, 120 },
+};
+
+static const struct panel_desc auo_p238han01 = {
+	.timings = &auo_p238han01_timings,
+	.num_timings = 1,
+	.bpc = 8,
+	.size = {
+		.width = 527,
+		.height = 296,
+	},
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+	.connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
 static const struct display_timing auo_p320hvn03_timings = {
 	.pixelclock = { 106000000, 148500000, 164000000 },
 	.hactive = { 1920, 1920, 1920 },
@@ -4937,6 +4961,9 @@ static const struct of_device_id platform_of_match[] = {
 	}, {
 		.compatible = "auo,g190ean01",
 		.data = &auo_g190ean01,
+	}, {
+		.compatible = "auo,p238han01",
+		.data = &auo_p238han01,
 	}, {
 		.compatible = "auo,p320hvn03",
 		.data = &auo_p320hvn03,