From: John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
Date: Fri, 11 Feb 2005 22:10:33 +0000 (+0000)
Subject: re PR middle-end/19697 (gcc.c-torture/execute/ieee/mzero6.c:24: error: unrecognizable... 
X-Git-Tag: releases/gcc-3.4.4~229
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8a99eed26376b074ca396869d08383a50c285354;p=thirdparty%2Fgcc.git

re PR middle-end/19697 (gcc.c-torture/execute/ieee/mzero6.c:24: error: unrecognizable insn)

        PR middle-end/19697
	2005-01-30  Roger Sayle  <roger@eyesopen.com>
        * config/pa/pa.md (anddi3, iordi3): On HPPA64, disallow an integer
        constant as the second operand and a register as the third.

From-SVN: r94897
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7339f09b8eed..67e70b3086ed 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2005-02-11  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
+
+        PR middle-end/19697
+	2005-01-30  Roger Sayle  <roger@eyesopen.com>
+        * config/pa/pa.md (anddi3, iordi3): On HPPA64, disallow an integer
+        constant as the second operand and a register as the third.
+
 2005-02-11  Jakub Jelinek  <jakub@redhat.com>
 
 	PR c++/19666
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 202c88f99ae4..22067388106a 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -5422,25 +5422,14 @@
 
 (define_expand "anddi3"
   [(set (match_operand:DI 0 "register_operand" "")
-	(and:DI (match_operand:DI 1 "and_operand" "")
+	(and:DI (match_operand:DI 1 "register_operand" "")
 		(match_operand:DI 2 "and_operand" "")))]
   ""
   "
 {
-  if (TARGET_64BIT)
-    {
-      /* One operand must be a register operand.  */
-      if (!register_operand (operands[1], DImode)
-	  && !register_operand (operands[2], DImode))
-	FAIL;
-    }
-  else
-    {
-      /* Both operands must be register operands.  */
-      if (!register_operand (operands[1], DImode)
-	  || !register_operand (operands[2], DImode))
-	FAIL;
-    }
+  /* Both operands must be register operands.  */
+  if (!TARGET_64BIT && !register_operand (operands[2], DImode))
+    FAIL;
 }")
 
 (define_insn ""
@@ -5501,25 +5490,14 @@
 
 (define_expand "iordi3"
   [(set (match_operand:DI 0 "register_operand" "")
-	(ior:DI (match_operand:DI 1 "ior_operand" "")
+	(ior:DI (match_operand:DI 1 "register_operand" "")
 		(match_operand:DI 2 "ior_operand" "")))]
   ""
   "
 {
-  if (TARGET_64BIT)
-    {
-      /* One operand must be a register operand.  */
-      if (!register_operand (operands[1], DImode)
-	  && !register_operand (operands[2], DImode))
-	FAIL;
-    }
-  else
-    {
-      /* Both operands must be register operands.  */
-      if (!register_operand (operands[1], DImode)
-	  || !register_operand (operands[2], DImode))
-	FAIL;
-    }
+  /* Both operands must be register operands.  */
+  if (!TARGET_64BIT && !register_operand (operands[2], DImode))
+    FAIL;
 }")
 
 (define_insn ""