From: Julian Seward <jseward@acm.org>
Date: Wed, 7 May 2014 11:09:28 +0000 (+0000)
Subject: Handle "blr lr" correctly -- read the destination register
X-Git-Tag: svn/VALGRIND_3_10_1^2~113
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8c7f35a18b9f3bb3a5bf17397006c5eea8c74650;p=thirdparty%2Fvalgrind.git

Handle "blr lr" correctly -- read the destination register
_before_ writing the return address in LR.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2857
---

diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c
index 57a2d4f8e7..862eb20e58 100644
--- a/VEX/priv/guest_arm64_toIR.c
+++ b/VEX/priv/guest_arm64_toIR.c
@@ -4453,8 +4453,10 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn,
          return True;
       }
       if (branch_type == BITS2(0,1) /* CALL */) {
+         IRTemp dst = newTemp(Ity_I64);
+         assign(dst, getIReg64orZR(nn));
          putIReg64orSP(30, mkU64(guest_PC_curr_instr + 4));
-         putPC(getIReg64orZR(nn));
+         putPC(mkexpr(dst));
          dres->whatNext = Dis_StopHere;
          dres->jk_StopHere = Ijk_Call;
          DIP("blr %s\n", nameIReg64orZR(nn));