From: Julian Seward Date: Thu, 6 Dec 2012 18:08:04 +0000 (+0000) Subject: Make diagnostics for SIGILL more controllable (VEX part). X-Git-Tag: svn/VALGRIND_3_9_0^2~199 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8db0aef8ec6bcdaa5168d007fa3d67efa7ce8ebf;p=thirdparty%2Fvalgrind.git Make diagnostics for SIGILL more controllable (VEX part). Fixes #309425. (Mark Wielaard, mjw@redhat.com) git-svn-id: svn://svn.valgrind.org/vex/trunk@2582 --- diff --git a/VEX/priv/guest_amd64_defs.h b/VEX/priv/guest_amd64_defs.h index f687d90a93..303d4eb54c 100644 --- a/VEX/priv/guest_amd64_defs.h +++ b/VEX/priv/guest_amd64_defs.h @@ -60,7 +60,8 @@ DisResult disInstr_AMD64 ( IRSB* irbb, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian ); + Bool host_bigendian, + Bool sigill_diag ); /* Used by the optimiser to specialise calls to helpers. */ extern diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c index 53553ebee3..9e8df2694f 100644 --- a/VEX/priv/guest_amd64_toIR.c +++ b/VEX/priv/guest_amd64_toIR.c @@ -26616,7 +26616,8 @@ DisResult disInstr_AMD64_WRK ( void* callback_opaque, Long delta64, VexArchInfo* archinfo, - VexAbiInfo* vbi + VexAbiInfo* vbi, + Bool sigill_diag ) { IRTemp t1, t2, t3, t4, t5, t6; @@ -27167,29 +27168,31 @@ DisResult disInstr_AMD64_WRK ( //default: decode_failure: /* All decode failures end up here. */ - vex_printf("vex amd64->IR: unhandled instruction bytes: " - "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", - (Int)getUChar(delta_start+0), - (Int)getUChar(delta_start+1), - (Int)getUChar(delta_start+2), - (Int)getUChar(delta_start+3), - (Int)getUChar(delta_start+4), - (Int)getUChar(delta_start+5), - (Int)getUChar(delta_start+6), - (Int)getUChar(delta_start+7) ); - vex_printf("vex amd64->IR: REX=%d REX.W=%d REX.R=%d REX.X=%d REX.B=%d\n", - haveREX(pfx) ? 1 : 0, getRexW(pfx), getRexR(pfx), - getRexX(pfx), getRexB(pfx)); - vex_printf("vex amd64->IR: VEX=%d VEX.L=%d VEX.nVVVV=0x%x ESC=%s\n", - haveVEX(pfx) ? 1 : 0, getVexL(pfx), - getVexNvvvv(pfx), - esc==ESC_NONE ? "NONE" : - esc==ESC_0F ? "0F" : - esc==ESC_0F38 ? "0F38" : - esc==ESC_0F3A ? "0F3A" : "???"); - vex_printf("vex amd64->IR: PFX.66=%d PFX.F2=%d PFX.F3=%d\n", - have66(pfx) ? 1 : 0, haveF2(pfx) ? 1 : 0, - haveF3(pfx) ? 1 : 0); + if (sigill_diag) { + vex_printf("vex amd64->IR: unhandled instruction bytes: " + "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", + (Int)getUChar(delta_start+0), + (Int)getUChar(delta_start+1), + (Int)getUChar(delta_start+2), + (Int)getUChar(delta_start+3), + (Int)getUChar(delta_start+4), + (Int)getUChar(delta_start+5), + (Int)getUChar(delta_start+6), + (Int)getUChar(delta_start+7) ); + vex_printf("vex amd64->IR: REX=%d REX.W=%d REX.R=%d REX.X=%d REX.B=%d\n", + haveREX(pfx) ? 1 : 0, getRexW(pfx), getRexR(pfx), + getRexX(pfx), getRexB(pfx)); + vex_printf("vex amd64->IR: VEX=%d VEX.L=%d VEX.nVVVV=0x%x ESC=%s\n", + haveVEX(pfx) ? 1 : 0, getVexL(pfx), + getVexNvvvv(pfx), + esc==ESC_NONE ? "NONE" : + esc==ESC_0F ? "0F" : + esc==ESC_0F38 ? "0F38" : + esc==ESC_0F3A ? "0F3A" : "???"); + vex_printf("vex amd64->IR: PFX.66=%d PFX.F2=%d PFX.F3=%d\n", + have66(pfx) ? 1 : 0, haveF2(pfx) ? 1 : 0, + haveF3(pfx) ? 1 : 0); + } /* Tell the dispatcher that this insn cannot be decoded, and so has not been executed, and (is currently) the next to be executed. @@ -27252,7 +27255,8 @@ DisResult disInstr_AMD64 ( IRSB* irsb_IN, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian_IN ) + Bool host_bigendian_IN, + Bool sigill_diag_IN ) { Int i, x1, x2; Bool expect_CAS, has_CAS; @@ -27275,7 +27279,7 @@ DisResult disInstr_AMD64 ( IRSB* irsb_IN, dres = disInstr_AMD64_WRK ( &expect_CAS, resteerOkFn, resteerCisOk, callback_opaque, - delta, archinfo, abiinfo ); + delta, archinfo, abiinfo, sigill_diag_IN ); x2 = irsb_IN->stmts_used; vassert(x2 >= x1); @@ -27308,7 +27312,7 @@ DisResult disInstr_AMD64 ( IRSB* irsb_IN, dres = disInstr_AMD64_WRK ( &expect_CAS, resteerOkFn, resteerCisOk, callback_opaque, - delta, archinfo, abiinfo ); + delta, archinfo, abiinfo, sigill_diag_IN ); for (i = x1; i < x2; i++) { vex_printf("\t\t"); ppIRStmt(irsb_IN->stmts[i]); diff --git a/VEX/priv/guest_arm_defs.h b/VEX/priv/guest_arm_defs.h index e064b40bc5..9702dbd345 100644 --- a/VEX/priv/guest_arm_defs.h +++ b/VEX/priv/guest_arm_defs.h @@ -52,7 +52,8 @@ DisResult disInstr_ARM ( IRSB* irbb, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian ); + Bool host_bigendian, + Bool sigill_diag ); /* Used by the optimiser to specialise calls to helpers. */ extern diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c index a59b6cb478..fe8ee477ad 100644 --- a/VEX/priv/guest_arm_toIR.c +++ b/VEX/priv/guest_arm_toIR.c @@ -12568,7 +12568,8 @@ DisResult disInstr_ARM_WRK ( void* callback_opaque, UChar* guest_instr, VexArchInfo* archinfo, - VexAbiInfo* abiinfo + VexAbiInfo* abiinfo, + Bool sigill_diag ) { // A macro to fish bits out of 'insn'. @@ -14664,15 +14665,17 @@ DisResult disInstr_ARM_WRK ( decode_failure: /* All decode failures end up here. */ - vex_printf("disInstr(arm): unhandled instruction: " - "0x%x\n", insn); - vex_printf(" cond=%d(0x%x) 27:20=%u(0x%02x) " - "4:4=%d " - "3:0=%u(0x%x)\n", - (Int)INSN_COND, (UInt)INSN_COND, - (Int)INSN(27,20), (UInt)INSN(27,20), - (Int)INSN(4,4), - (Int)INSN(3,0), (UInt)INSN(3,0) ); + if (sigill_diag) { + vex_printf("disInstr(arm): unhandled instruction: " + "0x%x\n", insn); + vex_printf(" cond=%d(0x%x) 27:20=%u(0x%02x) " + "4:4=%d " + "3:0=%u(0x%x)\n", + (Int)INSN_COND, (UInt)INSN_COND, + (Int)INSN(27,20), (UInt)INSN(27,20), + (Int)INSN(4,4), + (Int)INSN(3,0), (UInt)INSN(3,0) ); + } /* Tell the dispatcher that this insn cannot be decoded, and so has not been executed, and (is currently) the next to be executed. @@ -14781,7 +14784,8 @@ DisResult disInstr_THUMB_WRK ( void* callback_opaque, UChar* guest_instr, VexArchInfo* archinfo, - VexAbiInfo* abiinfo + VexAbiInfo* abiinfo, + Bool sigill_diag ) { /* A macro to fish bits out of insn0. There's also INSN1, to fish @@ -18785,8 +18789,9 @@ DisResult disInstr_THUMB_WRK ( decode_failure: /* All decode failures end up here. */ - vex_printf("disInstr(thumb): unhandled instruction: " - "0x%04x 0x%04x\n", (UInt)insn0, (UInt)insn1); + if (sigill_diag) + vex_printf("disInstr(thumb): unhandled instruction: " + "0x%04x 0x%04x\n", (UInt)insn0, (UInt)insn1); /* Back up ITSTATE to the initial value for this instruction. If we don't do that, any subsequent restart of the instruction @@ -18931,7 +18936,8 @@ DisResult disInstr_ARM ( IRSB* irsb_IN, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian_IN ) + Bool host_bigendian_IN, + Bool sigill_diag_IN ) { DisResult dres; Bool isThumb = (Bool)(guest_IP_ENCODED & 1); @@ -18953,12 +18959,12 @@ DisResult disInstr_ARM ( IRSB* irsb_IN, dres = disInstr_THUMB_WRK ( resteerOkFn, resteerCisOk, callback_opaque, &guest_code_IN[delta_ENCODED - 1], - archinfo, abiinfo ); + archinfo, abiinfo, sigill_diag_IN ); } else { dres = disInstr_ARM_WRK ( resteerOkFn, resteerCisOk, callback_opaque, &guest_code_IN[delta_ENCODED], - archinfo, abiinfo ); + archinfo, abiinfo, sigill_diag_IN ); } return dres; diff --git a/VEX/priv/guest_generic_bb_to_IR.c b/VEX/priv/guest_generic_bb_to_IR.c index 7a7e87408b..2c761f0bd0 100644 --- a/VEX/priv/guest_generic_bb_to_IR.c +++ b/VEX/priv/guest_generic_bb_to_IR.c @@ -187,6 +187,7 @@ IRSB* bb_to_IR ( /*IN*/ Addr64 guest_IP_bbstart, /*IN*/ Bool (*chase_into_ok)(void*,Addr64), /*IN*/ Bool host_bigendian, + /*IN*/ Bool sigill_diag, /*IN*/ VexArch arch_guest, /*IN*/ VexArchInfo* archinfo_guest, /*IN*/ VexAbiInfo* abiinfo_both, @@ -361,7 +362,8 @@ IRSB* bb_to_IR ( arch_guest, archinfo_guest, abiinfo_both, - host_bigendian ); + host_bigendian, + sigill_diag ); /* stay sane ... */ vassert(dres.whatNext == Dis_StopHere diff --git a/VEX/priv/guest_generic_bb_to_IR.h b/VEX/priv/guest_generic_bb_to_IR.h index 13cac1f219..22b1e8b877 100644 --- a/VEX/priv/guest_generic_bb_to_IR.h +++ b/VEX/priv/guest_generic_bb_to_IR.h @@ -153,7 +153,10 @@ typedef /*IN*/ VexAbiInfo* abiinfo, /* Is the host bigendian? */ - /*IN*/ Bool host_bigendian + /*IN*/ Bool host_bigendian, + + /* Should diagnostics be printed for illegal instructions? */ + /*IN*/ Bool sigill_diag ); @@ -174,6 +177,7 @@ IRSB* bb_to_IR ( /*IN*/ Addr64 guest_IP_bbstart, /*IN*/ Bool (*chase_into_ok)(void*,Addr64), /*IN*/ Bool host_bigendian, + /*IN*/ Bool sigill_diag, /*IN*/ VexArch arch_guest, /*IN*/ VexArchInfo* archinfo_guest, /*IN*/ VexAbiInfo* abiinfo_both, diff --git a/VEX/priv/guest_mips_defs.h b/VEX/priv/guest_mips_defs.h index 74f1259e36..d38ca5370b 100644 --- a/VEX/priv/guest_mips_defs.h +++ b/VEX/priv/guest_mips_defs.h @@ -52,7 +52,8 @@ extern DisResult disInstr_MIPS ( IRSB* irbb, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian ); + Bool host_bigendian, + Bool sigill_diag ); /* Used by the optimiser to specialise calls to helpers. */ extern IRExpr *guest_mips32_spechelper(const HChar * function_name, IRExpr ** args, diff --git a/VEX/priv/guest_mips_toIR.c b/VEX/priv/guest_mips_toIR.c index 1daadb3fac..f9fb4423a7 100644 --- a/VEX/priv/guest_mips_toIR.c +++ b/VEX/priv/guest_mips_toIR.c @@ -1205,7 +1205,8 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, void* callback_opaque, Long delta64, VexArchInfo* archinfo, - VexAbiInfo* abiinfo ) + VexAbiInfo* abiinfo, + Bool sigill_diag ) { IRTemp t0, t1, t2, t3, t4, t5, t6, t7, t8; UInt opcode, cins, rs, rt, rd, sa, ft, fs, fd, fmt, tf, nd, function, @@ -3557,12 +3558,13 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, decode_failure: /* All decode failures end up here. */ - DIP("vex mips->IR: unhandled instruction bytes: " - "0x%x 0x%x 0x%x 0x%x\n", - (Int) getIByte(delta_start + 0), - (Int) getIByte(delta_start + 1), - (Int) getIByte(delta_start + 2), - (Int) getIByte(delta_start + 3)); + if (sigill_diag) + vex_printf("vex mips->IR: unhandled instruction bytes: " + "0x%x 0x%x 0x%x 0x%x\n", + (Int) getIByte(delta_start + 0), + (Int) getIByte(delta_start + 1), + (Int) getIByte(delta_start + 2), + (Int) getIByte(delta_start + 3)); /* Tell the dispatcher that this insn cannot be decoded, and so has not been executed, and (is currently) the next to be executed. @@ -3652,7 +3654,8 @@ disInstr_MIPS(IRSB* irsb_IN, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian_IN) + Bool host_bigendian_IN, + Bool sigill_diag_IN) { DisResult dres; @@ -3668,7 +3671,7 @@ disInstr_MIPS(IRSB* irsb_IN, guest_PC_bbstart = (Addr32) toUInt(guest_IP - delta); dres = disInstr_MIPS_WRK(resteerOkFn, resteerCisOk, callback_opaque, - delta, archinfo, abiinfo); + delta, archinfo, abiinfo, sigill_diag_IN); return dres; } diff --git a/VEX/priv/guest_ppc_defs.h b/VEX/priv/guest_ppc_defs.h index 00b4ee7529..11844b10df 100644 --- a/VEX/priv/guest_ppc_defs.h +++ b/VEX/priv/guest_ppc_defs.h @@ -61,7 +61,8 @@ DisResult disInstr_PPC ( IRSB* irbb, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian ); + Bool host_bigendian, + Bool sigill_diag ); /* Used by the optimiser to specialise calls to helpers. */ extern diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index be53754e47..165aaafcbc 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -16478,7 +16478,8 @@ DisResult disInstr_PPC_WRK ( void* callback_opaque, Long delta64, VexArchInfo* archinfo, - VexAbiInfo* abiinfo + VexAbiInfo* abiinfo, + Bool sigill_diag ) { UChar opc1; @@ -17713,10 +17714,12 @@ DisResult disInstr_PPC_WRK ( decode_failure: /* All decode failures end up here. */ opc2 = (theInstr) & 0x7FF; - vex_printf("disInstr(ppc): unhandled instruction: " - "0x%x\n", theInstr); - vex_printf(" primary %d(0x%x), secondary %u(0x%x)\n", - opc1, opc1, opc2, opc2); + if (sigill_diag) { + vex_printf("disInstr(ppc): unhandled instruction: " + "0x%x\n", theInstr); + vex_printf(" primary %d(0x%x), secondary %u(0x%x)\n", + opc1, opc1, opc2, opc2); + } /* Tell the dispatcher that this insn cannot be decoded, and so has not been executed, and (is currently) the next to be executed. @@ -17777,7 +17780,8 @@ DisResult disInstr_PPC ( IRSB* irsb_IN, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian_IN ) + Bool host_bigendian_IN, + Bool sigill_diag_IN ) { IRType ty; DisResult dres; @@ -17813,7 +17817,7 @@ DisResult disInstr_PPC ( IRSB* irsb_IN, guest_CIA_bbstart = mkSzAddr(ty, guest_IP - delta); dres = disInstr_PPC_WRK ( resteerOkFn, resteerCisOk, callback_opaque, - delta, archinfo, abiinfo ); + delta, archinfo, abiinfo, sigill_diag_IN ); return dres; } diff --git a/VEX/priv/guest_s390_defs.h b/VEX/priv/guest_s390_defs.h index 3e18b84412..ebb6cbe5f7 100644 --- a/VEX/priv/guest_s390_defs.h +++ b/VEX/priv/guest_s390_defs.h @@ -50,7 +50,8 @@ DisResult disInstr_S390 ( IRSB* irbb, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian ); + Bool host_bigendian, + Bool sigill_diag ); /* Used by the optimiser to specialise calls to helpers. */ IRExpr* guest_s390x_spechelper ( const HChar *function_name, diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c index 3ca5cb0581..68bad92d95 100644 --- a/VEX/priv/guest_s390_toIR.c +++ b/VEX/priv/guest_s390_toIR.c @@ -73,6 +73,9 @@ static DisResult *dis_res; static Bool (*resteer_fn)(void *, Addr64); static void *resteer_data; +/* Whether to print diagnostics for illegal instructions. */ +static Bool sigill_diag; + /* The last seen execute target instruction */ ULong last_execute_target; @@ -14972,34 +14975,36 @@ s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres) if (status == S390_DECODE_OK) return insn_length; /* OK */ /* Decoding failed somehow */ - vex_printf("vex s390->IR: "); - switch (status) { - case S390_DECODE_UNKNOWN_INSN: - vex_printf("unknown insn: "); - break; + if (sigill_diag) { + vex_printf("vex s390->IR: "); + switch (status) { + case S390_DECODE_UNKNOWN_INSN: + vex_printf("unknown insn: "); + break; - case S390_DECODE_UNIMPLEMENTED_INSN: - vex_printf("unimplemented insn: "); - break; + case S390_DECODE_UNIMPLEMENTED_INSN: + vex_printf("unimplemented insn: "); + break; - case S390_DECODE_UNKNOWN_SPECIAL_INSN: - vex_printf("unimplemented special insn: "); - break; + case S390_DECODE_UNKNOWN_SPECIAL_INSN: + vex_printf("unimplemented special insn: "); + break; - default: - case S390_DECODE_ERROR: - vex_printf("decoding error: "); - break; - } + default: + case S390_DECODE_ERROR: + vex_printf("decoding error: "); + break; + } - vex_printf("%02x%02x", bytes[0], bytes[1]); - if (insn_length > 2) { - vex_printf(" %02x%02x", bytes[2], bytes[3]); - } - if (insn_length > 4) { - vex_printf(" %02x%02x", bytes[4], bytes[5]); + vex_printf("%02x%02x", bytes[0], bytes[1]); + if (insn_length > 2) { + vex_printf(" %02x%02x", bytes[2], bytes[3]); + } + if (insn_length > 4) { + vex_printf(" %02x%02x", bytes[4], bytes[5]); + } + vex_printf("\n"); } - vex_printf("\n"); return 0; /* Failed */ } @@ -15097,7 +15102,8 @@ disInstr_S390(IRSB *irsb_IN, VexArch guest_arch, VexArchInfo *archinfo, VexAbiInfo *abiinfo, - Bool host_bigendian) + Bool host_bigendian, + Bool sigill_diag_IN) { vassert(guest_arch == VexArchS390X); @@ -15109,6 +15115,7 @@ disInstr_S390(IRSB *irsb_IN, irsb = irsb_IN; resteer_fn = resteerOkFn; resteer_data = callback_opaque; + sigill_diag = sigill_diag_IN; return disInstr_S390_WRK(guest_code + delta); } diff --git a/VEX/priv/guest_x86_defs.h b/VEX/priv/guest_x86_defs.h index a47040af75..389e6bb15c 100644 --- a/VEX/priv/guest_x86_defs.h +++ b/VEX/priv/guest_x86_defs.h @@ -60,7 +60,8 @@ DisResult disInstr_X86 ( IRSB* irbb, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian ); + Bool host_bigendian, + Bool sigill_diag ); /* Used by the optimiser to specialise calls to helpers. */ extern diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c index c6f6c544b3..a3cef4d1b7 100644 --- a/VEX/priv/guest_x86_toIR.c +++ b/VEX/priv/guest_x86_toIR.c @@ -7933,7 +7933,8 @@ DisResult disInstr_X86_WRK ( void* callback_opaque, Long delta64, VexArchInfo* archinfo, - VexAbiInfo* vbi + VexAbiInfo* vbi, + Bool sigill_diag ) { IRType ty; @@ -15177,12 +15178,14 @@ DisResult disInstr_X86_WRK ( default: decode_failure: /* All decode failures end up here. */ - vex_printf("vex x86->IR: unhandled instruction bytes: " - "0x%x 0x%x 0x%x 0x%x\n", - (Int)getIByte(delta_start+0), - (Int)getIByte(delta_start+1), - (Int)getIByte(delta_start+2), - (Int)getIByte(delta_start+3) ); + if (sigill_diag) { + vex_printf("vex x86->IR: unhandled instruction bytes: " + "0x%x 0x%x 0x%x 0x%x\n", + (Int)getIByte(delta_start+0), + (Int)getIByte(delta_start+1), + (Int)getIByte(delta_start+2), + (Int)getIByte(delta_start+3) ); + } /* Tell the dispatcher that this insn cannot be decoded, and so has not been executed, and (is currently) the next to be executed. @@ -15245,7 +15248,8 @@ DisResult disInstr_X86 ( IRSB* irsb_IN, VexArch guest_arch, VexArchInfo* archinfo, VexAbiInfo* abiinfo, - Bool host_bigendian_IN ) + Bool host_bigendian_IN, + Bool sigill_diag_IN ) { Int i, x1, x2; Bool expect_CAS, has_CAS; @@ -15264,7 +15268,7 @@ DisResult disInstr_X86 ( IRSB* irsb_IN, dres = disInstr_X86_WRK ( &expect_CAS, resteerOkFn, resteerCisOk, callback_opaque, - delta, archinfo, abiinfo ); + delta, archinfo, abiinfo, sigill_diag_IN ); x2 = irsb_IN->stmts_used; vassert(x2 >= x1); @@ -15284,7 +15288,7 @@ DisResult disInstr_X86 ( IRSB* irsb_IN, dres = disInstr_X86_WRK ( &expect_CAS, resteerOkFn, resteerCisOk, callback_opaque, - delta, archinfo, abiinfo ); + delta, archinfo, abiinfo, sigill_diag_IN ); for (i = x1; i < x2; i++) { vex_printf("\t\t"); ppIRStmt(irsb_IN->stmts[i]); diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c index 4d98f51070..f4086627a1 100644 --- a/VEX/priv/main_main.c +++ b/VEX/priv/main_main.c @@ -605,6 +605,7 @@ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* vta ) vta->guest_bytes_addr, vta->chase_into_ok, host_is_bigendian, + vta->sigill_diag, vta->arch_guest, &vta->archinfo_guest, &vta->abiinfo_both, diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h index d5c3483cae..8e096cd67d 100644 --- a/VEX/pub/libvex.h +++ b/VEX/pub/libvex.h @@ -675,6 +675,9 @@ typedef /* IN: debug: trace vex activity at various points */ Int traceflags; + /* IN: debug: print diagnostics when an illegal instr is detected */ + Bool sigill_diag; + /* IN: profiling: add a 64 bit profiler counter increment to the translation? */ Bool addProfInc;