From: Rob Herring (Arm) Date: Thu, 10 Jul 2025 03:09:38 +0000 (+0930) Subject: arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8e7e63fc479af47449ef69d81f4dc4f3875b8e21;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have no CPU affinity. Signed-off-by: Rob Herring (Arm) Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org Signed-off-by: Andrew Jeffery Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au Signed-off-by: Arnd Bergmann --- diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi index fead4dde590df..acd3137d2464a 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi @@ -32,11 +32,6 @@ #interrupt-cells = <3>; interrupt-controller; #address-cells = <0>; - ppi-partitions { - ppi_cluster0: interrupt-partition-0 { - affinity = <&cpu0 &cpu1 &cpu2 &cpu3>; - }; - }; }; };