From: Dmitry Baryshkov Date: Fri, 21 Feb 2025 15:52:00 +0000 (+0200) Subject: dt-bindings: PCI: qcom-ep: Describe optional IOMMU X-Git-Tag: v6.15-rc1~119^2~4^2~4 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=8f5bd6cfc94a376e5fd8a6d4d1c559407942004f;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: PCI: qcom-ep: Describe optional IOMMU Some of Qualcomm platforms have an IOMMU unit between the PCIe IP and DDR. For example, the SA8775P specifies the iommu alththough it is not a part of bindings. Thus, change the schema in order to require the IOMMU for SA8775P and forbid it from being used on SDX55 (SM8450 will be handled in a later patch). This fixes the following warning: pcie-ep@1c10000: Unevaluated properties are not allowed ('iommus' was unexpected) Fixes: 9d3d5e75f31c ("dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC") Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-2-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński --- diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 0c2ca4cfa3b19..6075361348352 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -75,6 +75,9 @@ properties: - const: doorbell - const: dma + iommus: + maxItems: 1 + reset-gpios: description: GPIO used as PERST# input signal maxItems: 1 @@ -162,6 +165,7 @@ allOf: maxItems: 2 interrupt-names: maxItems: 2 + iommus: false - if: properties: @@ -234,6 +238,8 @@ allOf: interrupt-names: minItems: 3 maxItems: 3 + required: + - iommus unevaluatedProperties: false