From: GCC Administrator Date: Fri, 11 Dec 2020 18:23:32 +0000 (+0000) Subject: Daily bump. X-Git-Tag: releases/gcc-10.3.0~518 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=907525c3063e6ec5cf02790a5d5a37053c731401;p=thirdparty%2Fgcc.git Daily bump. --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 73181da607e7..e7a215888247 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,74 @@ +2020-12-11 Dennis Zhang + + Backported from master: + 2020-11-03 Dennis Zhang + + * config/aarch64/aarch64-simd-builtins.def (vget_lo_half): New entry. + (vget_hi_half): Likewise. + * config/aarch64/aarch64-simd.md (aarch64_vget_lo_halfv8bf): New entry. + (aarch64_vget_hi_halfv8bf): Likewise. + * config/aarch64/arm_neon.h (vget_low_bf16): New intrinsic. + (vget_high_bf16): Likewise. + +2020-12-11 Dennis Zhang + + Backported from master: + 2020-11-03 Dennis Zhang + + * config/aarch64/aarch64-simd-builtins.def(vbfcvt): New entry. + (vbfcvt_high, bfcvt): Likewise. + * config/aarch64/aarch64-simd.md(aarch64_vbfcvt): New entry. + (aarch64_vbfcvt_highv8bf, aarch64_bfcvtsf): Likewise. + * config/aarch64/arm_bf16.h (vcvtah_f32_bf16): New intrinsic. + * config/aarch64/arm_neon.h (vcvt_f32_bf16): Likewise. + (vcvtq_low_f32_bf16, vcvtq_high_f32_bf16): Likewise. + +2020-12-11 Andrea Corallo + + * config/arm/arm_neon.h (vst2_lane_bf16, vst2q_lane_bf16) + (vst3_lane_bf16, vst3q_lane_bf16, vst4_lane_bf16) + (vst4q_lane_bf16): New intrinsics. + * config/arm/arm_neon_builtins.def: Touch it for: + __builtin_neon_vst2_lanev4bf, __builtin_neon_vst2_lanev8bf, + __builtin_neon_vst3_lanev4bf, __builtin_neon_vst3_lanev8bf, + __builtin_neon_vst4_lanev4bf,__builtin_neon_vst4_lanev8bf. + +2020-12-11 Andrea Corallo + + * config/arm/arm_neon.h (vld2_lane_bf16, vld2q_lane_bf16) + (vld3_lane_bf16, vld3q_lane_bf16, vld4_lane_bf16) + (vld4q_lane_bf16): Add intrinsics. + * config/arm/arm_neon_builtins.def: Touch for: + __builtin_neon_vld2_lanev4bf, __builtin_neon_vld2_lanev8bf, + __builtin_neon_vld3_lanev4bf, __builtin_neon_vld3_lanev8bf, + __builtin_neon_vld4_lanev4bf, __builtin_neon_vld4_lanev8bf. + * config/arm/iterators.md (VQ_HS): Add V8BF to the iterator. + +2020-12-11 Andrea Corallo + + * config/arm/arm_neon.h (vst1_bf16, vst1q_bf16): Add intrinsics. + * config/arm/arm_neon_builtins.def : Touch for: + __builtin_neon_vst1v4bf, __builtin_neon_vst1v8bf. + +2020-12-11 Andrea Corallo + + * config/arm/arm-builtins.c (VAR14): Define macro. + * config/arm/arm_neon_builtins.def: Touch for: + __builtin_neon_vld1v4bf, __builtin_neon_vld1v8bf. + * config/arm/arm_neon.h (vld1_bf16, vld1q_bf16): Add intrinsics. + +2020-12-11 Andrea Corallo + + * config/arm/arm_neon.h (vst1_lane_bf16, vst1q_lane_bf16): Add + intrinsics. + * config/arm/arm_neon_builtins.def (STORE1LANE): Add v4bf, v8bf. + +2020-12-11 Andrea Corallo + + * config/arm/arm_neon_builtins.def: Add to LOAD1LANE v4bf, v8bf. + * config/arm/arm_neon.h (vld1_lane_bf16, vld1q_lane_bf16): Add + intrinsics. + 2020-12-09 Kewen Lin Backported from master: diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 9320aaa99a88..77ef0ead5262 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20201210 +20201211 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 3ea317a39dff..9e20a208763e 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,9 @@ +2020-12-10 Ed Schonberg + + PR ada/98230 + * exp_attr.adb (Expand_N_Attribute_Reference, case Mod): Use base + type of argument to obtain static bound and required size. + 2020-12-08 Eric Botcazou * gcc-interface/trans.c (maybe_make_gnu_thunk): Return false if the diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 50b4fcbccce8..0c497a8af174 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,13 @@ +2020-12-10 Patrick Palka + + Backported from master: + 2020-07-30 Patrick Palka + + PR c++/64194 + * pt.c (resolve_overloaded_unification): If the function + template specialization has a placeholder return type, + then instantiate it before attempting unification. + 2020-12-09 Jason Merrill PR c++/93083 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ae4cf6b9438..ae8560a479c9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,83 @@ +2020-12-11 Dennis Zhang + + Backported from master: + 2020-11-03 Dennis Zhang + + * gcc.target/aarch64/advsimd-intrinsics/bf16_get.c: New test. + +2020-12-11 Dennis Zhang + + Backported from master: + 2020-11-03 Dennis Zhang + + * gcc.target/aarch64/advsimd-intrinsics/bfcvt-compile.c + (test_vcvt_f32_bf16, test_vcvtq_low_f32_bf16): New tests. + (test_vcvtq_high_f32_bf16, test_vcvth_f32_bf16): Likewise. + +2020-12-11 Andrea Corallo + + * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c: + Run it also for arm-*-*. + * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/arm/simd/vstn_lane_bf16_1.c: New test. + +2020-12-11 Andrea Corallo + + * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_bf16_indices_1.c: + Run it also for the arm backend. + * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_bf16_indices_1.c: + Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_bf16_indices_1.c: + Likewise. + * gcc.target/arm/simd/vldn_lane_bf16_1.c: New test. + +2020-12-11 Andrea Corallo + + * gcc.target/arm/simd/vst1_bf16_1.c: New test. + +2020-12-11 Andrea Corallo + + * gcc.target/arm/simd/vld1_bf16_1.c: New test. + +2020-12-11 Andrea Corallo + + * gcc.target/arm/simd/vst1_lane_bf16_1.c: New testcase. + * gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise. + +2020-12-11 Andrea Corallo + + * gcc.target/arm/simd/vld1_lane_bf16_1.c: New testcase. + * gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise. + * gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise. + +2020-12-10 Ed Schonberg + + * gnat.dg/modular6.adb: New test. + +2020-12-10 Patrick Palka + + Backported from master: + 2020-07-30 Patrick Palka + + PR c++/64194 + * g++.dg/cpp1y/auto-fn60.C: New test. + 2020-12-09 Jason Merrill PR c++/93083