From: Wen He Date: Mon, 14 Oct 2019 07:13:27 +0000 (+0800) Subject: arm64: dts: ls1028a: Update #clock-cells of dpclk node X-Git-Tag: v5.5-rc1~39^2~13^2~20 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=91035cb05fb2ae62000b085ab2257c5a3e087170;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: ls1028a: Update #clock-cells of dpclk node Update the property #clock-cells = <1> to #clock-cells = <0> of the dpclk, since the Display output pixel clock driver provides single clock output. Signed-off-by: Wen He Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 51fa8f57fdacb..616b150a15aa6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -82,7 +82,7 @@ dpclk: clock-controller@f1f0000 { compatible = "fsl,ls1028a-plldig"; reg = <0x0 0xf1f0000 0x0 0xffff>; - #clock-cells = <1>; + #clock-cells = <0>; clocks = <&osc_27m>; }; @@ -665,7 +665,7 @@ interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, <0 223 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "DE", "SE"; - clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>, + clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>, <&clockgen 2 2>; clock-names = "pxlclk", "mclk", "aclk", "pclk"; arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;