From: Petar Jovanovic Date: Wed, 3 May 2017 14:34:02 +0000 (+0000) Subject: mips: remove unnecessary code X-Git-Tag: svn/VALGRIND_3_13_0^2~27 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=91fd95cacf247db38091b130de0bfc056aa844d8;p=thirdparty%2Fvalgrind.git mips: remove unnecessary code After r16309, abiinfo->guest__use_fallback_LLSC is already set for Cavium, and hence it is not necessary to check archinfo->hwcaps in VEX. git-svn-id: svn://svn.valgrind.org/vex/trunk@3358 --- diff --git a/VEX/priv/guest_mips_toIR.c b/VEX/priv/guest_mips_toIR.c index c10693c49f..3e6556ab93 100644 --- a/VEX/priv/guest_mips_toIR.c +++ b/VEX/priv/guest_mips_toIR.c @@ -16988,8 +16988,7 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, case 0x30: /* LL */ DIP("ll r%u, %u(r%u)", rt, imm, rs); LOAD_STORE_PATTERN; - if (VEX_MIPS_COMP_ID(archinfo->hwcaps) == VEX_PRID_COMP_CAVIUM - || abiinfo->guest__use_fallback_LLSC) { + if (abiinfo->guest__use_fallback_LLSC) { t2 = newTemp(ty); assign(t2, mkWidenFrom32(ty, load(Ity_I32, mkexpr(t1)), True)); putLLaddr(mkexpr(t1)); @@ -17007,8 +17006,7 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, if (mode64) { LOAD_STORE_PATTERN; t2 = newTemp(Ity_I64); - if (VEX_MIPS_COMP_ID(archinfo->hwcaps) == VEX_PRID_COMP_CAVIUM - || abiinfo->guest__use_fallback_LLSC) { + if (abiinfo->guest__use_fallback_LLSC) { assign(t2, load(Ity_I64, mkexpr(t1))); putLLaddr(mkexpr(t1)); putLLdata(mkexpr(t2)); @@ -17025,8 +17023,7 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, DIP("sc r%u, %u(r%u)", rt, imm, rs); t2 = newTemp(Ity_I1); LOAD_STORE_PATTERN; - if (VEX_MIPS_COMP_ID(archinfo->hwcaps) == VEX_PRID_COMP_CAVIUM - || abiinfo->guest__use_fallback_LLSC) { + if (abiinfo->guest__use_fallback_LLSC) { t3 = newTemp(Ity_I32); assign(t2, binop(mode64 ? Iop_CmpNE64 : Iop_CmpNE32, mkexpr(t1), getLLaddr())); @@ -17060,8 +17057,7 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *, if (mode64) { t2 = newTemp(Ity_I1); LOAD_STORE_PATTERN; - if (VEX_MIPS_COMP_ID(archinfo->hwcaps) == VEX_PRID_COMP_CAVIUM - || abiinfo->guest__use_fallback_LLSC) { + if (abiinfo->guest__use_fallback_LLSC) { t3 = newTemp(Ity_I64); assign(t2, binop(Iop_CmpNE64, mkexpr(t1), getLLaddr())); assign(t3, getIReg(rt));