From: Tamar Christina Date: Wed, 10 Nov 2021 12:02:39 +0000 (+0000) Subject: middle-end: Fix signbit tests when ran on ISA with support for masks. X-Git-Tag: basepoints/gcc-13~3202 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=92617a8e2af06c74e7df514d3560f246daf411e9;p=thirdparty%2Fgcc.git middle-end: Fix signbit tests when ran on ISA with support for masks. These test don't work on vector ISAs where the truth type don't match the vector mode of the operation. However I still want the tests to run on these architectures but just turn off the ISA modes that enable masks. This thus turns off SVE is it's on and turns off AVX512 if it's on. gcc/testsuite/ChangeLog: * gcc.dg/signbit-2.c: Turn off masks. * gcc.dg/signbit-5.c: Likewise. --- diff --git a/gcc/testsuite/gcc.dg/signbit-2.c b/gcc/testsuite/gcc.dg/signbit-2.c index fc0157cbc5c7..d8501e9b7a2d 100644 --- a/gcc/testsuite/gcc.dg/signbit-2.c +++ b/gcc/testsuite/gcc.dg/signbit-2.c @@ -1,6 +1,10 @@ /* { dg-do assemble } */ /* { dg-options "-O3 --save-temps -fdump-tree-optimized" } */ +/* This test does not work when the truth type does not match vector type. */ +/* { dg-additional-options "-mno-avx512f" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-march=armv8-a" { target aarch64_sve } } */ + #include void fun1(int32_t *x, int n) @@ -15,5 +19,5 @@ void fun2(int32_t *x, int n) x[i] = (-x[i]) >> 30; } -/* { dg-final { scan-tree-dump-times {\s+>\s+\{ 0, 0, 0, 0 \}} 1 optimized } } */ +/* { dg-final { scan-tree-dump {\s+>\s+\{ 0, 0, 0(, 0)+ \}} optimized } } */ /* { dg-final { scan-tree-dump-not {\s+>>\s+31} optimized } } */ diff --git a/gcc/testsuite/gcc.dg/signbit-5.c b/gcc/testsuite/gcc.dg/signbit-5.c index 22a92704773e..2b119cdfda7d 100644 --- a/gcc/testsuite/gcc.dg/signbit-5.c +++ b/gcc/testsuite/gcc.dg/signbit-5.c @@ -1,6 +1,11 @@ /* { dg-do run } */ /* { dg-options "-O3" } */ +/* This test does not work when the truth type does not match vector type. */ +/* { dg-additional-options "-mno-avx512f" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-march=armv8-a" { target aarch64_sve } } */ + + #include #include #include