From: Florian Krohm <florian@eich-krohm.de>
Date: Sun, 15 Jan 2012 21:01:16 +0000 (+0000)
Subject: Add support for the s390's TROO insn. These are the VEX bits.
X-Git-Tag: svn/VALGRIND_3_8_1^2~221
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=92cefd3d68d7ae7fe7a3d2adfc06de271f62d2e8;p=thirdparty%2Fvalgrind.git

Add support for the s390's TROO insn. These are the VEX bits.
New hardware capability: VEX_HWCAPS_S390X_ETF2.
Patch by Divya Vyas (divyvyas@linux.vnet.ibm.com).
Partial fix of #273114


git-svn-id: svn://svn.valgrind.org/vex/trunk@2237
---

diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c
index ec898601e5..20876fca1d 100644
--- a/VEX/priv/guest_s390_toIR.c
+++ b/VEX/priv/guest_s390_toIR.c
@@ -1584,6 +1584,16 @@ s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
       s390_disasm(ENC2(MNM, FPR), mnm, r1);
 }
 
+static void
+s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
+                       UChar m3, UChar r1, UChar r2)
+{
+   irgen(m3, r1, r2);
+
+   if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+      s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
+}
+
 static void
 s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
                      UChar r1, UChar r3, UChar r2)
@@ -10847,6 +10857,55 @@ s390_irgen_CKSM(UChar r1,UChar r2)
    return "cksm";
 }
 
+static HChar *
+s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
+{
+   IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
+   src_addr = newTemp(Ity_I64);
+   des_addr = newTemp(Ity_I64);
+   tab_addr = newTemp(Ity_I64);
+   test_byte = newTemp(Ity_I8);
+   src_len = newTemp(Ity_I64);
+
+   assign(src_addr, get_gpr_dw0(r2));
+   assign(des_addr, get_gpr_dw0(r1));
+   assign(tab_addr, get_gpr_dw0(1));
+   assign(src_len, get_gpr_dw0(r1+1));
+   assign(test_byte, get_gpr_b7(0));
+
+   IRTemp op = newTemp(Ity_I8);
+   IRTemp op1 = newTemp(Ity_I8);
+   IRTemp result = newTemp(Ity_I64);
+
+   /* End of source string? We're done; proceed to next insn */
+   s390_cc_set(0);
+   if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
+                     guest_IA_next_instr);
+
+   /* Load character from source string, index translation table and
+      store translated character in op1. */
+   assign(op, load(Ity_I8, mkexpr(src_addr)));
+
+   assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
+                        mkexpr(tab_addr)));
+   assign(op1, load(Ity_I8, mkexpr(result)));
+
+   if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
+      s390_cc_set(1);
+      if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
+                        guest_IA_next_instr);
+   }
+   store(get_gpr_dw0(r1), mkexpr(op1));
+
+   put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
+   put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
+   put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
+
+   always_goto_and_chase(guest_IA_curr_instr);
+
+   return "troo";
+}
+
 
 /*------------------------------------------------------------*/
 /*--- Build IR for special instructions                    ---*/
@@ -11652,7 +11711,8 @@ s390_decode_4byte_and_irgen(UChar *bytes)
    case 0xb990: /* TRTT */ goto unimplemented;
    case 0xb991: /* TRTO */ goto unimplemented;
    case 0xb992: /* TROT */ goto unimplemented;
-   case 0xb993: /* TROO */ goto unimplemented;
+   case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
+                                   ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);  goto ok;
    case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
                                    ovl.fmt.RRE.r2);  goto ok;
    case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
diff --git a/VEX/priv/host_s390_defs.h b/VEX/priv/host_s390_defs.h
index 2a5eddd8cd..cdce301469 100644
--- a/VEX/priv/host_s390_defs.h
+++ b/VEX/priv/host_s390_defs.h
@@ -487,6 +487,8 @@ extern const VexArchInfo *s390_archinfo_host;
                       (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_DFP))
 #define s390_host_has_fgx \
                       (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_FGX))
+#define s390_host_has_etf2 \
+                      (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_ETF2))
 
 #endif /* ndef __VEX_HOST_S390_DEFS_H */
 
diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h
index e2933c96fd..b9d5bc862d 100644
--- a/VEX/pub/libvex.h
+++ b/VEX/pub/libvex.h
@@ -128,13 +128,15 @@ typedef
 #define VEX_HWCAPS_S390X_GIE   (1<<8)   /* General-instruction-extension facility */
 #define VEX_HWCAPS_S390X_DFP   (1<<9)   /* Decimal floating point facility */
 #define VEX_HWCAPS_S390X_FGX   (1<<10)  /* FPR-GR transfer facility */
+#define VEX_HWCAPS_S390X_ETF2  (1<<11)  /* ETF2-enhancement facility */
 
 /* Special value representing all available s390x hwcaps */
 #define VEX_HWCAPS_S390X_ALL   (VEX_HWCAPS_S390X_LDISP | \
                                 VEX_HWCAPS_S390X_EIMM  | \
                                 VEX_HWCAPS_S390X_GIE   | \
                                 VEX_HWCAPS_S390X_DFP   | \
-                                VEX_HWCAPS_S390X_FGX)
+                                VEX_HWCAPS_S390X_FGX   | \
+                                VEX_HWCAPS_S390X_ETF2)
 
 #define VEX_HWCAPS_S390X(x)  ((x) & ~VEX_S390X_MODEL_MASK)
 #define VEX_S390X_MODEL(x)   ((x) &  VEX_S390X_MODEL_MASK)