From: Andrew Carlotti <andrew.carlotti@arm.com>
Date: Wed, 8 Jan 2025 18:29:27 +0000 (+0000)
Subject: aarch64: Improve mcpu/march conflict check
X-Git-Tag: basepoints/gcc-16~2367
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=936463004836cb565f4fc4773dccedbfccf0028f;p=thirdparty%2Fgcc.git

aarch64: Improve mcpu/march conflict check

Features from a cpu or base architecture that were explicitly disabled
by a +nofeat option were being incorrectly added back in before checking
for conflicts between -mcpu and -march options.  This patch instead
compares the returned feature masks directly.

gcc/ChangeLog:

	* config/aarch64/aarch64.cc (aarch64_override_options): Compare
	returned feature masks directly.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/target_attr_crypto_ice_1.c: Prune warning.
	* gcc.target/aarch64/target_attr_crypto_ice_2.c: Ditto.
---

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 9c4e9bc8acd..e7a75411f07 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -19289,13 +19289,10 @@ aarch64_override_options (void)
 	 cpu features would end up disabling an achitecture feature.  In
 	 otherwords the cpu features need to be a strict superset of the arch
 	 features and if so prefer the -march ISA flags.  */
-      auto full_arch_flags = arch->flags | arch_isa;
-      auto full_cpu_flags = cpu->flags | cpu_isa;
-      if (~full_cpu_flags & full_arch_flags)
+      if (~cpu_isa & arch_isa)
 	{
 	  std::string ext_diff
-	    = aarch64_get_extension_string_for_isa_flags (full_arch_flags,
-							  full_cpu_flags);
+	    = aarch64_get_extension_string_for_isa_flags (arch_isa, cpu_isa);
 	  warning (0, "switch %<-mcpu=%s%> conflicts with %<-march=%s%> switch "
 		      "and resulted in options %qs being added",
 		       aarch64_cpu_string,
diff --git a/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c b/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c
index 3b354c06110..f13e5e2560c 100644
--- a/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mcpu=thunderx+nofp -march=armv8-a" } */
+/* { dg-prune-output "warning: switch .* conflicts" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_2.c b/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_2.c
index d0a62b83351..ab2549228a7 100644
--- a/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mcpu=thunderx+nofp -march=armv8-a" } */
+/* { dg-prune-output "warning: switch .* conflicts" } */
 
 /* Make sure that we don't ICE when dealing with vector parameters
    in a simd-tagged function within a non-simd translation unit.  */